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PDF ( 数据手册 , 数据表 ) LTC1929-PG

零件编号 LTC1929-PG
描述 Synchronous Step-Down Switching Regulators
制造商 Linear
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LTC1929-PG 数据手册, 描述, 功能
FEATURES
s 2-Phase Single Output Controller
s Reduces Required Input Capacitance and Power
Supply Induced Noise
s Current Mode Control Ensures Current Sharing
s Phase-Lockable Fixed Frequency: 150kHz to 300kHz
s True Remote Sensing Differential Amplifier
s OPTI-LOOPTM Compensation Improves Transient
Response
s ±1% Output Voltage Accuracy
s Power Good Output Voltage Monitor (LTC1929-PG)
s Wide VIN Range: 4V to 36V Operation
s Very Low Dropout Operation: 99% Duty Cycle
s Adjustable Soft-Start Current Ramping
s Internal Current Foldback
s Short-Circuit Shutdown Timer with Defeat Option
s Overvoltage Soft-Latch Eliminates Nuisance Trips
s Available in 28-Lead SSOP Package
U
APPLICATIO S
s Desktop Computers
s Internet/Network Servers
s Large Memory Arrays
s DC Power Distribution Systems
LTC1929/LTC1929-PG
2-Phase, High Efficiency,
Synchronous Step-Down
Switching Regulators
DESCRIPTIO
The LTC®1929/LTC1929-PG are 2-phase, single output,
synchronous step-down current mode switching regula-
tor controllers that drive N-channel external power MOSFET
stages in a phase-lockable fixed frequency architecture.
The 2-phase controllers drive their two output stages out
of phase at frequencies up to 300kHz to minimize the RMS
ripple currents in both input and output capacitors. The
2-phase technique effectively multiplies the fundamental
frequency by two, improving transient response while
operating each channel at an optimum frequency for
efficiency. Thermal design is also simplified.
An internal differential amplifier provides true remote
sensing of the regulated supply’s positive and negative
output terminals as required by high current applications.
The RUN/SS pin provides soft-start and a defeatable,
timed, latched short-circuit shutdown to shut down both
channels. Internal foldback current limit provides protec-
tion for the external synchronous MOSFETs in the event of
an output fault. OPTI-LOOP compensation allows the
transient response to be optimized over a wide range of
output capacitance and ESR values.
, LTC and LT are registered trademarks of Linear Technology Corporation.
OPTI-LOOP is a trademark of Linear Technology Corporation.
TYPICAL APPLICATIO
0.1µF
0.1µF
VIN TG1
BOOST1
LTC1929 SW1
RUN/SS
BG1
1000pF
10k
100pF
ITH
PGND
SENSE1+
SENSE1
TG2
SGND
BOOST2
16k
16k
VDIFFOUT
EAIN
VOS–
VOS+
SW2
BG2
INTVCC
SENSE2+
SENSE2
10
0.47µF
0.47µF
10µF
10µF
35V
CERAMIC
×4
L1
1µH
D1
0.002
L2
D2 1µH
0.002
COUT: T510E108K004AS L1, L2: CEPH149-1ROMC
Figure 1. High Current 2-Phase Step-Down Converter
VIN
5V TO 28V
VOUT
1.6V/40A
+ COUT
1000µF
4V
×2
1929 F01
1







LTC1929-PG pdf, 数据表
LTC1929/LTC1929-PG
PI FU CTIO S
RUN/SS (Pin 1): Combination of Soft-Start, Run Control
Input and Short-Circuit Detection Timer. A capacitor to
ground at this pin sets the ramp time to full current output.
Forcing this pin below 0.8V causes the IC to shut down all
internal circuitry. All functions are disabled in shutdown.
SENSE1+, SENSE2+ (Pins 2,14): The (+) Input to the
Differential Current Comparators. The ITH pin voltage and
built-in offsets between SENSEand SENSE+ pins in
conjunction with RSENSE set the current trip threshold.
SENSE1, SENSE2(Pins 3, 13): The (–) Input to the
Differential Current Comparators.
EAIN (Pin 4): Input to the Error Amplifier that compares
the feedback voltage to the internal 0.8V reference voltage.
This pin is normally connected to a resistive divider from
the output of the differential amplifier (DIFFOUT).
PLLFLTR (Pin 5): The Phase-Locked Loop’s Low Pass
Filter is tied to this pin. Alternatively, this pin can be driven
with an AC or DC voltage source to vary the frequency of
the internal oscillator.
PLLIN (Pin 6): External Synchronization Input to Phase
Detector. This pin is internally terminated to SGND with
50k. The phase-locked loop will force the rising top gate
signal of controller 1 to be synchronized with the rising
edge of the PLLIN signal.
NC (Pins 7, 28): Not connected.
ITH (Pin 8): Error Amplifier Output and Switching Regula-
tor Compensation Point. Both current comparator’s thresh-
olds increase with this control voltage. The normal voltage
range of this pin is from 0V to 2.4V
SGND (Pin 9): Signal Ground, common to both control-
lers, must be routed separately from the input switched
current ground path to the common (–) terminal(s) of the
COUT capacitor(s).
VDIFFOUT (Pin 10): Output of a Differential Amplifier that
provides true remote output voltage sensing. This pin
normally drives an external resistive divider that sets the
output voltage.
VOS–, VOS+ (Pins 11, 12): Inputs to an Operational
Amplifier. Internal precision resistors capable of being
electronically switched in or out can configure it as a
differential amplifier (default for the LTC1929-PG) or an
uncommitted Op Amp.
AMPMD (Pin 15): (LTC1929 Only) This Logic Input pin
controls the connections of internal precision resistors
that configure the operational amplifier as a unity-gain
differential amplifier.
PGOOD (Pin 15): (LTC1929-PG Only) Open-Drain Logic
Output. PGOOD is pulled to ground when the voltage on
the EAIN pin is not within ±7.5% of its set point.
TG2, TG1 (Pins 16, 27): High Current Gate Drives for Top
N-Channel MOSFETS. These are the outputs of floating
drivers with a voltage swing equal to INTVCC superim-
posed on the switch node voltage SW.
SW2, SW1 (Pins 17, 26): Switch Node Connections to
Inductors. Voltage swing at these pins is from a Schottky
diode (external) voltage drop below ground to VIN.
BOOST2, BOOST1 (Pins 18, 25): Bootstrapped Supplies
to the Topside Floating Drivers. Capacitors are connected
between the Boost and Switch pins, and Schottky diodes
are tied between the Boost and INTVCC pins.
BG2, BG1 (Pins 19, 23): Voltage Swing High Current Gate
Drives for Bottom Synchronous N-Channel MOSFETS.
Voltage swing at these pins is from ground to INTVCC.
PGND (Pin 20): Driver Power Ground. Connects to sources
of bottom N-channel MOSFETS and the (–) terminals of
CIN.
INTVCC (Pin 21): Output of the Internal 5V Linear Low
Dropout Regulator and the EXTVCC Switch. The driver and
control circuits are powered from this voltage source.
Decouple to power ground with a 1µF ceramic capacitor
placed directly adjacent to the IC and minimum of 4.7µF
additional tantalum or other low ESR capacitor.
EXTVCC (Pin 22): External Power Input to an Internal
Switch . This switch closes and supplies INTVCC, bypass-
ing the internal low dropout regulator whenever EXTVCC is
higher than 4.7V. See EXTVCC Connection in the Applica-
tions Information section. Do not exceed 7V on this pin
and ensure VEXTVCC VIN.
VIN (Pin 24): Main Supply Pin. Should be closely decoupled
to the IC’s signal ground pin.
8







LTC1929-PG equivalent, schematic
LTC1929/LTC1929-PG
APPLICATIO S I FOR ATIO
EXTVCC Connection
The LTC1929 contains an internal P-channel MOSFET
switch connected between the EXTVCC and INTVCC pins.
When the voltage applied to EXTVCC rises above 4.7V, the
internal regulator is turned off and the switch closes,
connecting the EXTVCC pin to the INTVCC pin thereby
supplying internal and MOSFET gate driving power. The
switch remains closed as long as the voltage applied to
EXTVCC remains above 4.5V. This allows the MOSFET
driver and control power to be derived from the output
during normal operation (4.7V < VEXTVCC < 7V) and from
the internal regulator when the output is out of regulation
(start-up, short-circuit). Do not apply greater than 7V to
the EXTVCC pin and ensure that EXTVCC < VIN + 0.3V when
using the application circuits shown. If an external voltage
source is applied to the EXTVCC pin when the VIN supply is
not present, a diode can be placed in series with the
LTC1929’s VIN pin and a Schottky diode between the
EXTVCCand the VINpin, to prevent current from backfeeding
VIN.
Significant efficiency gains can be realized by powering
INTVCC from the output, since the VIN current resulting
from the driver and control currents will be scaled by the
ratio: (Duty Factor)/(Efficiency). For 5V regulators this
means connecting the EXTVCC pin directly to VOUT. How-
ever, for 3.3V and other lower voltage regulators, addi-
tional circuitry is required to derive INTVCC power from the
output.
The following list summarizes the four possible connec-
tions for EXTVCC:
1. EXTVCC left open (or grounded). This will cause INTVCC
to be powered from the internal 5V regulator resulting in
a significant efficiency penalty at high input voltages.
2. EXTVCC connected directly to VOUT. This is the normal
connection for a 5V regulator and provides the highest
efficiency.
3. EXTVCC connected to an external supply. If an external
supply is available in the 5V to 7V range, it may be used to
power EXTVCC providing it is compatible with the MOSFET
gate drive requirements.
4. EXTVCC connected to an output-derived boost network.
For 3.3V and other low voltage regulators, efficiency gains
can still be realized by connecting EXTVCC to an output-
derived voltage which has been boosted to greater than
4.7V but less than 7V. This can be done with either the
inductive boost winding as shown in Figure 5a or the
capacitive charge pump shown in Figure 5b. The charge
pump has the advantage of simple magnetics.
Topside MOSFET Driver Supply (CB,DB) (Refer to
Functional Diagram)
External bootstrap capacitors CB1 and CB2 connected to
the BOOST1 and BOOST2 pins supply the gate drive
voltages for the topside MOSFETs. Capacitor CB in the
Functional Diagram is charged though diode DB from
INTVCC when the SW pin is low. When the topside MOSFET
turns on, the driver places the CB voltage across the gate-
source of the desired MOSFET. This enhances the MOSFET
and turns on the topside switch. The switch node voltage,
OPTIONAL EXTVCC CONNECTION
5V < VSEC < 7V
+
CIN
VIN
VIN
TG1
LTC1929
EXTVCC
SW1
N-CH
BG1
1N4148
T1
VSEC
+
RSENSE
+
1µF
VOUT
COUT
PGND
N-CH
1929 F05a
Figure 5a. Secondary Output Loop with EXTVCC Connection
+
CIN
VIN
TG1
LTC1929
N-CH
EXTVCC
SW1
BG1
PGND
N-CH
VIN +
BAT85 0.22µF
BAT85
VN2222LL
BAT85
RSENSE
VOUT
L1
+
COUT
1929 F05b
Figure 5b. Capacitive Charge Pump for EXTVCC
16










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