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PDF ( 数据手册 , 数据表 ) UPD70F3826

零件编号 UPD70F3826
描述 32-bit single-chip microcontrollers
制造商 Renesas
LOGO Renesas LOGO 


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UPD70F3826 数据手册, 描述, 功能
Preliminary Datasheet
μ PD70F3826, 70F3827, 70F3828, 70F3829, 70F3830, 70F3831,
70F3832, 70F3833, 70F3834, 70F3835, 70F3836, 70F3837
R01DS0029EJ0001
Rev.0.01
V850ES/JE3-E, V850ES/JF3-E, V850ES/JG3-ERENESAS MCU
Sep 30, 2010
Description
The μPD70F3826, 70F3827, 70F3828, 70F3829 (V850ES/JF3-E), and μPD70F3830, 70F3831, 70F3832, 70F3833
(V850ES/JF3-E), and μPD70F3834, 70F3835, 70F3836, 70F3837 (V850ES/JG3-E) are products of the V850 32-bit
single-chip microcontrollers, and include peripheral functions such as ROM/RAM, timer/counters, serial interfaces, an
A/D converter, a DMA controller , a CAN controller , a USB function controller , and a Ethernet controller.
In addition to their high real-time responsiveness and one-clock-pitch execution of instructions, the V850ES/JE3-E,
V850ES/JF3-E, and V850ES/JG3-E include instructions executed via a hardware multiplier, saturation instructions, and
bit manipulation instructions.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
V850ES/JE3-E, V850ES/JF3-E, V850ES/JG3-E Hardware User’s Manual: To be prepared
V850ES Architecture User’s Manual:
U15943E
Features
{ Number of instructions: 83
{ Minimum instruction execution time:
20 ns (@ 50 MHz operation with main clock (fXX))
{ Clock
Main clock oscillation: fX = 3 to 6.25 MHz
Subclock oscillation: fXT = 32.768 kHz
Internal oscillation: fR = 220 kHz (TYP.)
{ General-purpose registers: 32 bits × 32 registers
{ Instruction set:
Signed multiplication, saturation operations, 32-bit
shift instructions, bit manipulation instructions,
load/store instructions
{ Memory space:
64 MB linear address space
{ Internal memory
Flash memory: 64/128/256 KB
RAM:
32/48/64 KB
(Including 16 KB of data RAM area)
{ I/O lines Total: 26/42/62
{ Interrupts and exceptions
Non-maskable interrupts: 2 sources
Maskable interrupts: 63/78/85 sources
R01DS0029EJ0001 Rev.0.01
Sep 30, 2010
{ Timer/counters
16-bit timer/event counter AA (TAA): 5 channels
16-bit timer/event counter AB (TAB): 1 channel
Motor control function supported
16-bit interval timer M (TMM):
4 channels
16-bit encoder timer T (TMT):
1 channel
{ Real-time counter: 1 channel
{ Watchdog timer: 1 channel
{ Real-time output function: 6 channels
{ A/D converter: 10-bit resolution × 10/10 channels
{ Ethernet controller:
1 channel
{ USB function controller:
1 channel
{ Serial interface
CAN :1 channel (μPD70F3829, 70F3833, 70F3837 only)
Asynchronous serial interface C(UARTC): 3/4 channels
Clocked serial interface F(CSIF):
2/3/5 channels
I2C bus interface:
{ DMA controller: 4 channels
{ Power save function:
2/3 channels
HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE mode
{ On-chip debug function
{ Package: 64-pin LQFP (V850ES/JE3-E)
64-pin WQFN (V850ES/JE3-E)
80-pin LQFP (V850ES/JF3-E)
100-pin LQFP (V850ES/JG3-E)
113-pin FBGA (Under planing)
{ Operating supply voltage: 2.85 to 3.6 V
Page 1 of 75







UPD70F3826 pdf, 数据表
μ PD70F3826, 70F3827, 70F3828, 70F3829, 70F3830, 70F3831, 70F3832, 70F3833, 70F3834, 70F3835, 70F3836, 70F3837
V850ES/JF3-E
80-pin plastic LQFP (fine pitch) (12 × 12)
μPD70F3830GK-GAK-AX
μPD70F3831GK-GAK-AX
μPD70F3832GK-GAK-AX
μPD70F3833GK-GAK-AX
AVREF0
AVss
P02/NMI
P20/INTP01
VDD
REGCNote2
VSS
X1
X2
RESET
XT1
XT2
P23/SIF1/TXDC1/SDA00/INTP03
P24/SOF1/RXDC1/SCL00/INTP04
P25/SCKF1/TIAA30/TOAA30
P26/TIAA31/TOA31/INTP05
P30/TXDC/SIF2/TIAA00/TOAA00
P31/RXDC0/SOF2/TIAA01/TOAA01
P32/ASCKC0/SCKF2/TIAA10/TOAA10
P50/INTP07/DDI
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
1 60
2 59
3 58
4 57
5 56
6 55
7 54
8 53
9 52
10 51
11 50
12 49
13 48
14 47
15 46
16 45
17 44
18 43
19 42
20 41
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
P93/TOAB1B2/TRGAB1/KR3/INTP14
P92/TOAB1T2/TOAB12/TIAB12/KR2/INTP13
P91/TOAB1B1/TIAB10/KR/TOAB10
P90/TOAB1T1/TOAB11/TIAB11/KR0/INTP12
P1MDIO
P1MDC
P1COL
P1CRS
EVDD
EVSS
FLMD0Note1
REGCNote2
VDD
P1RXCLK
P1RXER
P1RXDV
P1RXD3
P1RXD2
P1RXD1
P1RXD0
Notes 1. Connect to VSS in normal mode.
2. Connect the REGC pin to VSS via a 4.7 μF (preliminary value) capacitor.
3. μ PD70F3833 only.
R01DS0029EJ0001 Rev.0.01
Sep 30, 2010
Page 8 of 75







UPD70F3826 equivalent, schematic
μ PD70F3826, 70F3827, 70F3828, 70F3829, 70F3830, 70F3831, 70F3832, 70F3833, 70F3834, 70F3835, 70F3836, 70F3837
1. PIN FUNCTIONS
(2/2)
Pin
Name
I/O
Function
Alternate Function
Pin number
JE3-E JF3-E JG3-E
P70 I/O
P71
P72
Port 7
10-bit I/O port
Input/output can be specified in 1-bit units.
ANI0
ANI1
ANI2
64 80 100
63 79 99
62 78 98
P73
ANI3
61 77 97
P74
ANI4
60 76 96
P75
ANI5
59 75 95
P76
ANI6
58 74 94
P77
ANI7
57 73 93
P78
ANI8
56 72 92
P79
ANI9
55 71 91
P90 I/O
P91
P92
P93
Port 9
13-bit I/O port(V850ES/JG3-E)
11-bit I/O port(V850ES/JF3-E)
Input/output can be specified in 1-bit units.
TOAB1T1/TOAB11/TIAB11/KR0/INTP12
TOAB1B1/TIAB10/KR1/TOAB10
TOAB1T2/TOAB12/TIAB12/KR2/INTP13
TOAB1B2/TRGAB1/KR3/INTP14
57 72
58 73
59 74
60 75
P94
TOAB1T3/TOAB13/TIAB13/KR4/INTP15
61 76
P95
TOAB1B3/EVTB1/KR5/INTP16
62 77
P96
TECR0/TIT00/KR6/TOT00
31 40
P97
TENC00/TIT01/KR7/TOT01
32 41
P98
TENC01/INTP17
33 42
P912
TOAB1OFF/INTP18
63 78
P913
SIF31/INTP19
− − 30
INTP19
25
P914
SOF3/INTP20
− − 31
P915
SCKF3
− − 32
PDL0 I/O
Port DL
− − − 58
PDL1
11-bit I/O port(V850ES/JG3-E)
− − − 59
1-bit I/O port(V850ES/JF3-E, V850ES/JE3-E)
PDL2
− − − 60
Input/output can be specified in 1-bit units.
PDL3
− − − 66
PDL4
− − − 67
PDL5
FLMD1
49 64 79
PDL6
− − − 83
PDL7
− − − 84
PDL8
− − − 33
PDL9
− − − 34
PDL10
− − − 43
Remark JE3-E: V850ES/JE3-E, JF3-E: V850ES/JF3-E, JG3-E: V850ES/JG3-E
R01DS0029EJ0001 Rev.0.01
Sep 30, 2010
Page 16 of 75










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