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PDF ( 数据手册 , 数据表 ) PYA28C010

零件编号 PYA28C010
描述 EEPROM
制造商 PYRAMID
LOGO PYRAMID LOGO 


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PYA28C010 数据手册, 描述, 功能
FEATURES
Access Times of 120, 150, 200, and 250ns
Single 5V±10% Power Supply
Simple Byte and Page Write
Low Power CMOS:
- 60 mA Active Current
- 500 µA Standby Current
Fast Write Cycle Times
PYA28C010
128K x 8 EEPROM
Software Data Protection
Fully TTL Compatible Inputs and Outputs
Endurance:
- 10,000 Cycles/byte
- 100,000 Cycles/page
Data Retention: 100 Years
Available in the following package:
– 32-Pin 600 mil Ceramic DIP
– 32-Pin Ceramic LCC (450x550 mils)
– 32-Pin Solder Seal Flatpack
– 44-Pin Ceramic LCC (650x650 mils)
DESCRIPTION
The PYA28C010 is a 5 Volt 128Kx8 EEPROM using float-
ing gate CMOS Technology. The device supports 64-byte
page write operation. The PYA28C010 features DATA and
Toggle Bit Polling as well as a system software scheme
used to indicate early completion of a Write Cycle. The
device also includes user-optional software data protection.
Data Retention is 100 Years. The device is available in
a 32-Pin 600 mil wide Ceramic DIP, 32-Pin LCC, 32-Pin
Solder Seal Flatpack and 44-Pin Ceramic LCC.
Functional Block Diagram
Pin Configuration
Document # EEPROM103 REV 03
DIP (C10)
LCC (L6)
Revised July 2014







PYA28C010 pdf, 数据表
TIMING WAVEFORM OF PAGE WRITE CYCLE
PYA28C010 - 128K x 8 EEPROM
NOTES:
• For each successive write within the page write operation, A8-A16 should be the same. Otherwise, writes to an un-
known address could occur.
• Between successive byte writes within a page write operation, OE can be strobed LOW. For example, this can be
done with CE and WE HIGH to fetch data from another memory device within the system for the next write. Alterna-
tively, this can be done with WE HIGH and CE LOW, effectively performing a polling operation.
• The timings shown above are unique to page write operations. Individual byte load operations within the page write
must conform to either the CE or WE controlled write cycle timing.
Document # EEPROM103 REV 03
Page 8














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