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PDF ( 数据手册 , 数据表 ) ISL8273M

零件编号 ISL8273M
描述 80A Single Channel Digital PMBus Step-Down Power Module
制造商 Intersil
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ISL8273M 数据手册, 描述, 功能
DATASHEET
80A Single Channel Digital PMBus Step-Down Power
Module
ISL8273M
The ISL8273M is a complete PMBus enabled DC/DC single
channel step-down advance power supply capable of delivering
up to 80A of current and optimized for high power density
applications. For higher output current, up to four ISL8273Ms
can be paralleled to supply up to 320A in a multiphase current
sharing configuration.
Operating over an input voltage range of 4.5V to 14V, the
ISL8273M offers adjustable output voltages down to 0.6V and
achieves up to 93% conversion efficiencies. A unique
ChargeMode™ control architecture provides a single clock cycle
response to an output load step and can support switching
frequencies up to 1MHz. The power module integrates all power
and most passive components and only requires a few external
components to operate. A set of optional external resistors allows
the user to easily configure the device for standard operation. For
advanced configurations, a standard PMBus interface addresses
such things as sequencing and fault management, as well as
real-time full telemetry and point-of-load monitoring. Additionally,
an on-board nonvolatile memory can store the desired custom
configuration and settings.
A fully customizable voltage, current and temperature
protection scheme insures safe operation for the ISL8273M
under abnormal operating conditions. The device is also
supported by the PowerNavigator™ software, a full digital
power train development environment.
The ISL8273M is available in a low profile compact
18mmx23mmx7.5mm fully encapsulated thermally enhanced
HDA package.
Applications
• Server, telecom, storage and datacom
• Industrial/ATE and networking equipment
• General purpose power for ASIC, FPGA, DSP and memory
Features
• Complete digital power supply
• 80A single channel output current
- 4.5V to 14V single rail input voltage
- Up to 93% efficiency
- Up to 320A/4 parallel modules capable solution
- Multiphase and current sharing operations (180°/22.5°
steps)
• Programmable output voltage
- 0.6V to 2.5V output voltage settings
- ±1% accuracy over line/load/temperature
• ChargeMode™ control loop architecture
- 296kHz to 1.06MHz fixed switching frequency operations
- No compensation required
- Fast single clock cycle transient response
• PMBus interface and/or pin-strap mode
- Fully programmable through PMBus
- Pin-strap mode for standard settings
- Real-time telemetry for VIN, VOUT, IOUT, temperature, duty
cycle and fSW
• Advanced soft-start/stop, sequencing and margining
• On-board nonvolatile memory
• Complete over/undervoltage, current and temperature
protections with fault logging
• PowerNavigator™ supported
• Thermally enhanced 18mmx23mmx7.5mm HDA package
Related Literature
UG036, “ISL8273MEVAL1Z Evaluation Board User Guide”
VIN
CIN
ENABLE
10µF 10µF
100k
2x10µF
6.65k
VIN
VDD
EN
PG
VR5
VR6
VDRV
VCC
VDRV1
VMON
ISL8273M
VOUT
VSENP
VSENN
VR
VR55
SGND
SCL
SDA
SALRT
PGND
VOUT
COUT
23mm
PMBUS
INTERFACE
7.5mm
18mm
NOTE: Figure 1 represents a typical implementation of the ISL8273M. For PMBus
operation, it is recommended to tie the enable pin (EN) to SGND.
FIGURE 1. 80A APPLICATION CIRCUIT
FIGURE 2. A SMALL PACKAGE FOR HIGH POWER DENSITY
September 10, 2015
FN8704.1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2015. All Rights Reserved
Intersil (and design), ChargeMode, PowerNavigator and Digital-DC are trademarks owned by Intersil Corporation
or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners.







ISL8273M pdf, 数据表
ISL8273M
Typical Application Circuit - Three Module Current Sharing
VAUX OR VCC 3.3V TO 5V
SMBus Address= 0x2A
SHOULD BE ACTIVE BEFORE ENABLE 4.7k: 4.7k: 4.7k: 4.7k:
51.1k:
R1 R2 R3 R4
R7
DDC
SCL
SDA
SALRT
2x470µF
VIN BULK
12V
C1
SYNC
4x47μF
CERAMIC
C2 C3
10µF
10µF 10µF
C4 C5
VCC1 10µF 10µF
R5
100k:
C6 C7
DDC
SCL
SDA
SALRT
SYNC
VIN
VDD
VR5
VR6
VDRV
VCC
VDRV1
R6
6.65k:
VMON
PIN STRAP RESISTORS
(OPTIONAL)
R8 R9 R10 R11
ISL8273M
VR55
VR
SWD1
SW1
SWD2
SW2
VOUT
4x100µF
CERAMIC
C8
12x100μF 12x470μF
CERAMIC POSCAP
C23 C24
VOUT
1V 240A
SMBus Address = 0x2B
56.2k:
R14
PIN STRAP RESISTORS
(OPTIONAL)
R15 R16 R17 R18
4x47µF
CERAMIC
C9 C10
10µF
10µF 10µF
C11 C12
VCC2 10µF 10µF
R12
100k:
C13 C14
R13
6.65k:
DDC
SCL
SDA
SALRT
SYNC
VIN
VDD
VR5
VR6
VDRV
VCC
VDRV1
VMON
ISL8273M
VR55
VR
SWD1
SW1
SWD2
SW2
VOUT
4x100µF
CERAMIC
C15
SMBus Address = 0x2C
61.9k:
R21
4x47µF
CERAMIC
C16 C17
10µF
10µF 10µF
C18 C19
VCC3 10µF 10µF
R19
100k: C20 C21
R20
6.65k:
DDC
SCL
SDA
SALRT
SYNC
VIN
VDD
VR5
VR6
VDRV
VCC
VDRV1
VMON
PIN STRAP RESISTORS
(OPTIONAL)
R22 R23 R24 R25
ISL8273M
VR55
VR
SWD1
SW1
SWD2
SW2
VOUT
4x100µF
CERAMIC
C22
FIGURE 4. TYPICAL APPLICATION CIRCUIT - THREE MODULE CURRENT SHARING
Submit Document Feedback
8
FN8704.1
September 10, 2015







ISL8273M equivalent, schematic
ISL8273M
Functional Description
SMBus Communications
The ISL8273M provides a PMBus digital interface that enables
the user to configure all aspects of the module operation as well
as monitor the input and output parameters. The ISL8273M can
be used with any SMBus host device. In addition, the module is
compatible with PMBus™ Power System Management Protocol
Specification Parts I and II version 1.2. The ISL8273M accepts
most standard PMBus commands. When configuring the device
using PMBus commands, it is recommended that the enable pin
is tied to SGND.
The SMBus device address is the only parameter that must be
set by the external pins. All other device parameters can be set
using PMBus commands.
The ISL8273M can operate without the PMBus in pin-strap mode
with configurations programmed by pin-strap resistors, such as
output voltage, switching frequency, device SMBus address, input
UVLO, soft-start/stop and current sharing.
Output Voltage Selection
The output voltage may be set to a voltage between 0.6V and
2.5V provided that the input voltage is higher than the desired
output voltage by an amount sufficient to maintain regulation.
The VSET pin is used to set the output voltage to levels as shown
in Table 3. The RSET resistor is placed between the VSET pin and
SGND. A standard 1% resistor is required.
TABLE 3. OUTPUT VOLTAGE RESISTOR SETTINGS
VOUT
(V)
RSET
(kΩ)
0.60
10
0.65
11
0.70
12.1
0.75
13.3
0.80
14.7
0.85
16.2
0.90
17.8
0.95
19.6
1.00
21.5, or Connect to SGND
1.05
23.7
1.10
26.1
1.15
28.7
1.20
31.6, or OPEN
1.25
34.8
1.30
38.3
1.40
42.2
1.50
46.4
1.60
51.1
1.70
56.2
TABLE 3. OUTPUT VOLTAGE RESISTOR SETTINGS (Continued)
VOUT
(V)
RSET
(kΩ)
1.80
61.9
1.90
68.1
2.00
75
2.10
82.5
2.20
90.9
2.30
100
2.50
110, or Connect to V25
The output voltage may also be set to any value between 0.6V and
2.5V using the PMBus command VOUT_COMMAND. This device
supports dynamic voltage scaling, by allowing change to the output
voltage set point during regulation. The voltage transition rate is
specified by the PMBus command VOUT_TRANSITION_RATE.
By Default, VOUT_MAX is set to 110% of VOUT set by the pin-strap
resistor, which can be changed to any value up to 2.75V by the
PMBus Command VOUT_MAX.
Soft-Start, Stop Delay and Ramp Times
The ISL8273M follows an internal start-up procedure after power
is applied to the VDD pin. The module requires approximately
60ms to 70ms to check for specific values stored in its internal
memory and programmed by pin-strap resistors. Once this
process is completed, the device is ready to accept commands
via the PMBus interface and the module is ready to be enabled. If
the module is to be synchronized to an external clock source, the
clock frequency must be stable prior to asserting the EN pin.
It may be necessary to set a delay from when an enable signal is
received until the output voltage starts to ramp to its target
value. In addition, the designer may wish to precisely set the time
required for VOUT to ramp to its target value after the delay
period has expired. These features may be used as part of an
overall inrush current management strategy or to precisely
control how fast a load IC is turned on. The ISL8273M gives the
system designer several options for precisely and independently
controlling both the delay and ramp time periods. The soft-start
delay period begins when the EN pin is asserted and ends when
the delay time expires.
The soft-start delay and ramp-up time can be programmed to
custom values using the PMBus commands TON_DELAY and
TON_RISE. When the delay time is set to 0ms, the device begins
its ramp-up after the internal circuitry has initialized
(approximately 2ms). When the soft-start ramp period is set to
0ms, the output ramps up as quickly as the output load
capacitance and loop settings allow. It is generally
recommended to set the soft-start ramp to a value greater than
1ms to prevent inadvertent fault conditions due to excessive
inrush current.
Similar to the soft-start delay and ramp-up time, the delay and
ramp down time for soft-stop/off can be programmed using the
PMBus commands TOFF_DELAY and TOFF_FALL. In addition, the
module can be configured as “immediate off” using the
Submit Document Feedback 16
FN8704.1
September 10, 2015










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