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PDF ( 数据手册 , 数据表 ) F59D1G81A

零件编号 F59D1G81A
描述 1 Gbit (128M x 8/ 64M x 16) 1.8V NAND Flash Memory
制造商 Elite Semiconductor
LOGO Elite Semiconductor LOGO 


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F59D1G81A 数据手册, 描述, 功能
ESMT
Flash
FEATURES
Voltage Supply: 1.8V (1.7 V ~ 1.95V)
Organization
x8:
- Memory Cell Array: (128M + 4M) x 8bit
- Data Register: (2K + 64) x 8bit
x16:
- Memory Cell Array: (64M + 2M) x 16bit
- Data Register: (1K + 32) x 16bit
Automatic Program and Erase
x8:
- Page Program: (2K + 64) Byte
- Block Erase: (128K + 4K) Byte
x16:
- Page Program: (1K + 32) Word
- Block Erase: (64K + 2K) Word
Page Read Operation
- Page Size: (2K + 64) Byte (x8)
Page Size: (1K + 32) Word (x16)
- Random Read: 25us (Max.)
- Serial Access: 45ns (Min.)
Memory Cell: 1bit/Memory Cell
Fast Write Cycle Time
- Program time: 250us (Typ.)
- Block Erase time: 2ms (Typ.)
Command/Address/Data Multiplexed I/O Port
F59D1G81A / F59D1G161A
1 Gbit (128M x 8/ 64M x 16)
1.8V NAND Flash Memory
Hardware Data Protection
- Program/Erase Lockout During Power Transitions
Reliable CMOS Floating Gate Technology
- ECC Requirement: x8 - 1bit/528Byte,
x16 - 1bit/264Word
- Endurance: 100K Program/Erase Cycles
- Data Retention: 10 Years
Command Register Operation
Automatic Page 0 Read at Power-Up Option
- Boot from NAND support
- Automatic Memory Download
NOP: 4 cycles
Cache Program Operation for High Performance Operation
Copy-Back Operation
EDO mode
OTP Operation
No Bad-Block-Erasing-Protect function (user should manage
bad blocks before erasing)
ORDERING INFORMATION
Product ID
x8:
F59D1G81A -45TG
F59D1G81A -45BG
x16:
F59D1G161A -45BG
Speed
45 ns
45 ns
45 ns
Package
48 pin TSOPI
63 ball BGA
63 ball BGA
Comments
Pb-free
Pb-free
Pb-free
Elite Semiconductor Memory Technology Inc.
Publication Date: May 2014
Revision: 1.5
1/43







F59D1G81A pdf, 数据表
ESMT
F59D1G81A / F59D1G161A
Product Introduction
The device is a 1,056Mbit memory organized as 64K rows (pages) by 2,112x8 columns. Spare 64x8 columns are located from column
address of 2,048~2,111. A 2,112-byte data register is connected to memory cell arrays accommodating data transfer between the I/O
buffers and memory during page read and page program operations. The program and read operations are executed on a page basis,
while the erase operation is executed on a block basis. The memory array consists of 1,024 separately erasable 128K-byte blocks. It
indicates that the bit-by-bit erase operation is prohibited on the device.
The device has addresses multiplexed into 8 I/Os or 16I/Os. This scheme dramatically reduces pin counts and allows system upgrades
to future densities by maintaining consistency in system board design. Command, address and data are all written through I/O's by
bringing WE to low while CE is low. Those are latched on the rising edge of WE . Command Latch Enable (CLE) and Address
Latch Enable (ALE) are used to multiplex command and address respectively, via the I/O pins. Some commands require one bus cycle.
For example, Reset Command, Status Read Command, etc require just one cycle bus. Some other commands, like page read and
block erase and page program, require two cycles: one cycle for setup and the other cycle for execution.
In addition to the enhanced architecture and interface, the device incorporates copy-back program feature from one page to another
page without need for transporting the data to and from the external buffer memory.
Command Set
Function
1st Cycle
2nd Cycle
Read
Read for Copy Back
Read ID
Reset
Page Program
Copy-Back Program
Block Erase
Random Data Input(1)
Random Data Output(1)
Read Status
Cache Program
Cache Read
Read Start for Last Page Cache Read
00h
00h
90h
FFh
80h
85h
60h
85h
05h
70h
80h
31h
3Fh
Note:
1. Random Data Input / Output can be executed in a page.
30h
35h
-
-
10h
10h
D0h
-
E0h
-
15h
-
-
Acceptable Command
during Busy
O
O
Elite Semiconductor Memory Technology Inc.
Publication Date: May 2014
Revision: 1.5
8/43







F59D1G81A equivalent, schematic
ESMT
F59D1G81A / F59D1G161A
Erase Flow Chart
Read Flow Chart
Elite Semiconductor Memory Technology Inc.
Publication Date: May 2014
Revision: 1.5
16/43










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