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PDF ( 数据手册 , 数据表 ) LC05112CMT

零件编号 LC05112CMT
描述 1-Cell Lithium-Ion Battery Protection IC
制造商 ON Semiconductor
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LC05112CMT 数据手册, 描述, 功能
LC05112CMT
CMOS LSI
1-Cell Lithium-Ion Battery
Protection IC with integrated
Power MOS FET
http://onsemi.com
Overview
The LC05112CMT is a protection IC for 1-cell lithium-ion secondary
batteries with integrated power MOS FET. Also it integrates highly
accurate detection circuits and detection delay circuits to prevent batteries
from over-charging, over-discharging, over-current discharging and
over-current charging.
A battery protection system can be made by only LC05112CMT and
few external parts..
WDFN6 2.6x4.0, 0.65P, Dual Flag
Feature
Charge-and-discharge power MOSFET are integrated at Ta = 25C, VCC = 4.5V
ON resistance (total of charge and discharge) 11.2m(typ)
Highly accurate detection voltage/current at Ta = 25C, VCC = 3.7V
Over-charge detection
±25mV
Over-discharge detection
±50mV
Charge over-current detection
±0.7A
Discharge over-current detection ±0.7A
Delay time for detection and release (fixed internally)
Discharge/Charge over-current detection is compensated for temperature dependency of power FET.
0V battery charging
: “Unavailable”
Over charge detection voltage
: 4.0V to 4.5V (5mV steps)
Over charge release hysteresis
: 0V to 0.3V (100mV steps)
Over discharge detection voltage
: 2.2V to 2.8V (50mV steps)
Over discharge release hysteresis
: 0V to 0.075V (25mV steps)
Discharge over current detection
: 2.0A to 8.0A (0.5A steps)
Charge over current detection
: 8.0A to -2.0A (0.5A steps)
Over-discharge detection delay time
: 20ms or 128ms
Typical Applications
Smart phone
Tablet
Wearable device
ORDERING INFORMATION
See detailed ordering and shipping information on page 15 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
September 2014 - Rev. 1
1
Publication Order Number :
LC05112CMT/D







LC05112CMT pdf, 数据表
LC05112CMT
Package Demensions
unit : mm
WDFN6 2.6x4.0, 0.65P, Dual Flag
CASE 511BZ
ISSUE O
D
6 54
AB
PIN ONE
REFERENCE
2X 0.10 C
1 23
2X
0.10 C
TOP VIEW
0.10 C
E
A
8X 0.05 C
NOTE 3
A3
SIDE VIEW
C
SEATING
PLANE
D2
D3
1
3
D4
4X L2
E3 E2
6X L
6
e
4
10X b
0.10 M C A B
BOTTOM VIEW
0.05 M C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. PROFILE TOLERANCE APPLIES TO THE
EXPOSED PADS AS WELL AS THE LEADS.
MILLIMETERS
DIM MIN MAX
A 0.80
A3 0.10 0.25
b 0.25 0.40
D 2.60 BSC
D2 2.075 2.375
D3 1.20 1.50
D4 0.40 0.70
E 4.00 BSC
E2 2.95 3.05
E3 2.25 2.55
e 0.65 BSC
L 0.12 0.32
L2 0.10
GENERIC
MARKING DIAGRAM*
XXXXX
XXXXX
AYWW
XXXXX = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
= Pb-Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer
to device data sheet for actual part
marking.
RECOMMENDED
SOLDERING FOOTPRINT*
0.53
0.27
2.29
6X
0.40
2.50 4.20
PACKAGE
OUTLINE
1
0.65
PITCH
6X
0.40
DIMENSION: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://www.onsemi.com
8














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