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PDF ( 数据手册 , 数据表 ) AK1573C

零件编号 AK1573C
描述 Frequency Synthesizer
制造商 AKM
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AK1573C 数据手册, 描述, 功能
[AK1573/AK1573B/AK1573C]
AK1573/AK1573B/AK1573C
Frequency Synthesizer with Integrated VCO
1. General Description
AK1573 is the Integer-N frequency synthesizer with integrated VCO (Voltage Controlled Oscillator). It is
composed of programmable charge pump, reference divider, programmable divider, dual modulus
prescaler (P / P + 1). With the feature of high-performance, low noise and small size, it can be used as a
local signal source of a variety of frequency conversion.
By combining with an external loop filter, AK1573 form a complete Phase Locked Loop.
Access to the register is controlled by the serial interface of the 3-wire and Power supply voltage is 2.7V
to 3.3V.
2. Features
Normalized Phase Noise
-223dBc/Hz
Low Noise Integrated VCO
-86dBc/Hz@10kHz
-112dBc/Hz@100kHz
Operating Supply Voltage
2.7 to 3.3V
Low Current Comsumption@0dBm Output
AK1573
43mA
AK1573B
44mA
AK1573C
46mA
Programmable to Divide by
Programmable Output Power
Fast Lock-up Function
Analog or Digital Lock Detect Function
Output Mute Function
Package
Operating Temperature Range
1, 2, 4, 8, 16, 32, 64
-12dBm to +6dBm
24pin QFN (0.5mm pitch 4x4mm)
-40 ºC to 85 ºC
Frequency Coverage Options
VCO Frequency [MHz]
Divide by 1
Divide by 2
Divide by 4
Divide by 8
Divide by 16
Divide by 32
Divide by 64
AK1573
1480 to 2240
1480 to 2240
740 to 1120
370 to 560
185 to 280
92.5 to 140
46.25 to 70
30 to 35
AK1573B
1728 to 2600
1728 to 2600
864 to 1300
432 to 650
216 to 325
108 to 162.5
54 to 81.25
30 to 40.625
AK1573C
2100 to 3000
2100 to 3000
1050 to 1500
525 to 750
262.5 to 375
131.25 to 187.5
65.625 to 93.75
32.8125 to 46.875
015009351-E-00
-1-
2015/8







AK1573C pdf, 数据表
[AK1573/AK1573B/AK1573C]
10.3. Analog Circuit Characteristics
VDD=2.7 to 3.3V, -40C<Ta<85C, BIAS resistance =27kunless otherwise specified.
The exposed pad at the center of the backside should be connected to the ground
Parameter
Min. Typ. Max. Unit
Description
REFIN
Input sensitivity
Input Frequency Range
0.4
0.4
10
VDD
2
300
Vpp
Vpp
MHz
REFIN frequency < 200MHz
REFIN frequency 200MHz
Maximum available prescaler
output Frequency
300 MHz Design guarantee value
Phase Frequency Detector(PFD)
PFD Frequency
104 MHz Design guarantee value
Maximum Charge Pump current
Minimum Charge pump current
Charge Pump
2800
350
μA
μA
Icp TRI-STATE leak current
1
nA
Ta = 25C, Vcpo = VDD / 2
Vcpo : CP pin voltage
Sink / Source current mismatch * 1
Icp vs. Vcpo * 2
1
10
%
Vcpo = VDD / 2, Ta = 25C
Vcpo : CP pin voltage
3
15
%
0.5 Vcpo VDD - 0.5
Ta = 25C
VCO
1480
2240 MHz AK1573
Operating Frequency Range
1728
2600 MHz AK1573B
2100
3000 MHz AK1573C
VCO tuning Sensitivity
Phase Noise
@ 1.6GHz (AK1573)
@ 1.8GHz (AK1573B)
@ 2.1GHz (AK1573C)
OUTLV[2:0] bits 011
10kHz offset
100kHz offset
1MHz offset
10MHz offset
fvco×0.02
-86
-112
-133
-151
MHz/V
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
fvco : Oscillation Frequency
VCOI bit = 1
VCOI bit = “1”
VCOI bit = “1”
VCOI bit = “1”
Normalized Phase Noise
-223
dBc/Hz Note 3
OUTPUT Power @1GHz
Output Buffer
6
3
1
-5
dBm
dBm
dBm
dBm
OUTLV[2:0] bits = 111
OUTLV[2:0] bits = 101
OUTLV[2:0] bits = 011
OUTLV[2:0] bits = 001
Output Frequency
30
MHz Design guarantee value
Regulator
VREF1 start-up time
10 ms
Note
* 1. Sink/Source current mismatch[(|Isink|-|Isource|)/{(|Isink|+|Isource|)/2}] * 100 [%]
* 2. Icp v.s.Vcpo[{1/2*(|I1|-|I2|)}/{1/2*(|I1|+|I2|)}]*100 [%]
* 3. Measured in-band phase noise with the loop locked. Normalized Phase Noise is calculated from
following equation. REFIN frequency = 120MHz, FPFD = 10MHz.
(PNtotal = PNsynth -10 Log FPFD- 20 Log N)
PNtotal : Normalized Phase Noise
PNsynth : In-band Phase Noise
FPFD : PFD Frequency
015009351-E-00
-8-
2015/8







AK1573C equivalent, schematic
[AK1573/AK1573B/AK1573C]
(a) VCOI bit = 0
(b) VCOI bit = 1
Figure.16 Current vs. Output frequency
REFIN frequency = 100MHz, R counter = 100, CP1[2:0] bits = 111, DIV[2:0] bits = 000
(a) VCOI bit = 0, DIV[2:0] bits = 000
(b) VCOI bit = 1, DIV[2:0] bits = 000
(c) VCOI bit = 1, DIV[2:0] bits = 001
(d) VCOI bit = 1, DIV[2:0] bits = 010
015009351-E-00
- 16 -
2015/8










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