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PDF ( 数据手册 , 数据表 ) LE25S40FD

零件编号 LE25S40FD
描述 4M-bit (512K x 8) Serial Flash Memory
制造商 ON Semiconductor
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LE25S40FD 数据手册, 描述, 功能
LE25S40FD
Advance Information
CMOS LSI
4M-bit (512K x 8)
Serial Flash Memory
www.onsemi.com
Overview
The LE25S40FD is a SPI bus flash memory device with a 4M bit (512K 8-
bit) configuration. It uses a single 1.8V power supply. While making the
most of the features inherent to a serial flash memory device, the
LE25S40FD is housed in an 8-pin ultra-miniature package. All these features
make this device ideally suited to storing program in applications such as
portable information devices, which are required to have increasingly more
compact dimensions. The LE25S40FD also has a small sector erase
capability which makes the device ideal for storing parameters or data that
have fewer rewrite cycles and conventional EEPROMs cannot handle due to
insufficient capacity.
VSOIC8 NB
Features
Read/write operations enabled by single 1.8V power supply: 1.65 to 1.95V supply voltage range
Operating frequency : 40MHz
Temperature range
: 40 to 85C
Serial interface
: SPI mode 0, mode 3 supported
Sector size
: 4K bytes/small sector, 64K bytes/sector
Small sector erase, sector erase, chip erase functions
Page program function (256 bytes / page)
Block protect function
Highly reliable read/write
Number of rewrite times : 100,000 times
Small sector erase time : 40ms (typ), 150ms (max)
Sector erase time
: 80ms (typ), 250ms (max)
Chip erase time
: 300ms (typ), 3.0s (max)
Page program time : 6.0ms/256 bytes (typ), 8.0ms/256 bytes (max)
Status functions
: Ready/busy information, protect information
Data retention period : 20 years
Package
: VSOIC8 NB
* This product is licensed from Silicon Storage Technology, Inc. (USA).
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
ORDERING INFORMATION
See detailed ordering and shipping information on page 22 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
November 2014 - Rev. P0
1
Publication Order Number :
LE25S40FD/D







LE25S40FD pdf, 数据表
LE25S40FD
2-2. Status register write
The information in status registers BP0, BP1, BP2, TB and SRWP can be rewritten using the status register write
command. RDY, WEN and bit 6 are read-only bits and cannot be rewritten. The information in bits BP0, BP1, BP2,
TB and SRWP is stored in the non-volatile memory, and when it is written in these bits, the contents are retained
even at power-down. "Figure 6 Status Register Write" shows the timing waveforms of status register write, and
Figure 19 shows a status register write flowchart. Consisting of the first and second bus cycles, the status register
write command initiates the internal write operation at the rising CS edge after the data has been input following
(01h). Erase and program are performed automatically inside the device by status register write so that erasing or
other processing is unnecessary before executing the command. By the operation of this command, the information
in bits BP0, BP1, BP2, TB and SRWP can be rewritten. Since bits RDY (bit 0), WEN (bit 1) and bit 6 of the status
register cannot be written, no problem will arise if an attempt is made to set them to any value when rewriting the
status register. Status register write ends can be detected by RDY of status register read. To initiate status register
write, the logic level of the WP pin must be set high and status register WEN must be set to "1".
Figure 6 Status Register Write
CS
tWPS
Self-timed
Write Cycle
tSRW
tWPH
WP
SCK
SI
SO
Mode3
Mode0
0 1 2 3 4 5 6 7 8 15
MSB
8CLK
01h
DATA
High Impedance
2-3. Contents of each status register
RDY (Bit 0)
The RDY register is for detecting the write (program, erase and status register write) end. When it is "1", the device is
in a busy state, and when it is "0", it means that write is completed.
WEN (bit 1)
The WEN register is for detecting whether the device can perform write operations. If it is set to "0", the device will
not perform the write operation even if the write command is input. If it is set to "1", the device can perform write
operations in any area that is not block-protected.
WEN can be controlled using the write enable and write disable commands. By inputting the write enable command
(06h), WEN can be set to "1"; by inputting the write disable command (04h), it can be set to "0." In the following
states, WEN is automatically set to "0" in order to protect against unintentional writing.
At power-on
Upon completion of small sector erase, sector erase or chip erase
Upon completion of page program
Upon completion of status register write
* If a write operation has not been performed inside the LE25S40FD because, for instance, the command input for
any of the write operations (small sector erase, sector erase, chip erase, page program, or status register write) has
failed or a write operation has been performed for a protected address, WEN will retain the status established prior
to the issue of the command concerned. Furthermore, its state will not be changed by a read operation.
www.onsemi.com
8







LE25S40FD equivalent, schematic
LE25S40FD
Specifications
Absolute Maximum Ratings
Parameter
Maximum supply voltage
DC voltage (all pins)
Storage temperature
Symbol
VDDmax
VIN/VOUT
Tstg
With respect to VSS
With respect to VSS
Conditions
Ratings
-0.5 to +2.4
-0.5 to VDD+0.5
-55 to +150
unit
V
V
C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Operating Conditions
Parameter
Operating supply voltage
Operating ambient temperature
Symbol
VDD
Topr
Conditions
Ratings
1.65 to 1.95
-40 to +85
unit
V
C
Allowable DC Operating Conditions
Parameter
Read mode operating current
Write mode operating current
(erase+page program)
CMOS standby current
Power-down standby current
Input leakage current
Output leakage current
Input low voltage
Input high voltage
Output low voltage
Output high voltage
Symbol
ICCR
ICCW
ISB
IDSB
ILI
ILO
VIL
VIH
VOL
VOH
Conditions
SCK=0.1VDD/0.9VDD,
HOLD=WP=0.9VDD,
SO=open,25MHz
SCK=0.1VDD/0.9VDD,
HOLD=WP=0.9VDD,
SO=open,40MHz
tSSE= tSE= tCHE=typ.,tPP=max
CS=VDD, HOLD=WP=VDD,
SI=VSS/VDD, SO=open,
CS=VDD, HOLD=WP=VDD,
SI=VSS/VDD, SO=open,
IOL=100A, VDD=VDD min
IOL=1.6mA, VDD=VDD min
IOH=-100A, VDD=VDD min
Ratings
min typ max
unit
6 mA
-0.3
0.7VDD
VCC-0.2
8 mA
15 mA
50 A
10
2
2
0.3VDD
VDD+0.3
0.2
0.4
A
A
A
V
V
V
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
Data hold, Rewriting frequency
Parameter
Rewriting frequency
Data hold
condition
Program/Erase
Status resister write
min
100,000
1,000
20
max
unit
times/
Sector
year
Pin Capacitance at Ta=25C, f=1MHz
Parameter
Symbol
Conditions
Ratings
max
unit
Output pin capacitance
CSO
VSO=0V
12 pF
Input pin Capacitance CIN VIN=0V
6 pF
Note: These parameter values do not represent the results of measurements undertaken for all devices but rather values
for some of the sampled devices.
www.onsemi.com
16










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