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PDF ( 数据手册 , 数据表 ) IS2021

零件编号 IS2021
描述 Bluetooth 4.1 Stereo Audio SOC
制造商 ISSC
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IS2021 数据手册, 描述, 功能
IS2020/21/23/25 SoC
Bluetooth® 4.1 Stereo Audio SOC
Features
System Specification
Compliant with Bluetooth Specification v.4.1
(EDR) in 2.4 GHz ISM band
It supports following profiles :
- HFP 1.6
- HSP 1.1
- A2DP 1.2
- AVRCP 1.5
- SPP 1.0
- PBAP 1.0
Baseband Hardware
16MHz main clock input
Built-in internal ROM for program memory
Support to connect to two hosts ( phones,
tablets…) with HFP or A2DP profiles
simultaneously
Adaptive Frequency Hopping (AFH) avoids
occupied RF channels
Fast Connection supported
RF Hardware
Fully Bluetooth 4.1 (EDR) system in 2.4 GHz
ISM band.
Combined TX/RX RF terminal simplifies
external matching and reduces external
antenna switches.
Max. +4dBm output power with 20 dB level
control from register control.
Built-in T/R switch for Class 2/3 application
To avoid temperature variation, temperature
sensor with temperature calibration is utilized
into bias current and gain control.
Fully integrated synthesizer has been created.
There requires no external VCO, varactor
diode, resonator and loop filter.
Crystal oscillation with built-in digital trimming
for temperature/process variations.
Audio processor
Support 64 kb/s A-Law or -Law PCM format,
or CVSD (Continuous Variable Slope Delta
Modulation) for SCO channel operation.
Noise suppression
Echo suppression
SBC and optional AAC decoding
Packet loss concealment
Build-in four languages (Chinese/ English/
Spanish/ French) voice prompts and 20 events
for each one (This function can be set up in
IS20XXS_UItool.)
Support SCMS-T
Audio Codec
20 bit DAC and 16 bit ADC codec
98dB SNR DAC playback
Built-in 2 channel 2.3W class-D amplifier for a
4Ω speaker (for IS2025S only)
Peripherals
Built-in Lithium-ion battery charger (up to
350mA)
Integrate 3V, 1.8V configurable switching
regulator and LDO
Built-in ADC for battery monitor and voltage
sense.
A line-in port for external audio input
Two LED drivers
Flexible HCI interface
High speed HCI-UART (Universal
Asynchronous Receiver Transmitter) interface
(up to 921600bps)
Package
5x6.5mm2 48QFN package (IS2021S)
7x7mm2 56QFN package (IS2020S, IS2023S)
8x8mm2 68QFN package (IS2025S)
Description
Stereo Audio Chip is a compact, highly
integrated, CMOS single-chip RF and
baseband IC for Bluetooth v4.1 with Enhanced
Data Rate 2.4GHz applications. This chip is
fully compliant with Bluetooth specification and
completely backward-compatible with Bluetooth
3.0, 2.0 or 1.2 systems.
It incorporates Bluetooth 1M/2M/3Mbps RF,
single-cycle 8bit MCU, TX/RX modem, 5-port
memory controller, task/hopping controller,
Page 1







IS2021 pdf, 数据表
Stereo Audio SoC
Pin No.
42
43
44
Pin type
I
I
P
Name
XO_N
XO_P
VCC_RF
Description
16MHz Crystal input negative
16MHz Crystal input positive
RF power input (1.28V) for both synthesizer and TX/RX block
Pin No.
45
46
Pin type
I/O
I
47 I
48 I
49 I
50 I
51 P
52 O
53 P
54 O
55 O
56 P
57 P
Name
RTX
P0_2
P2_0
P2_7
P3_0
P0_5
VDD_IO
AOHPR
VDDAO
AOHPM
AOHPL
VDDA
EP
Description
RF RTX path
IO pin, default pull-high input (Note 1)
Play/Pause key (default), active low.
IO pin, default pull-high input
System Configuration,
H: Application L: Baseband(IBDK Mode)
IO pin, default pull-high input (Note 1)
Volume up key (default), active low.
IO pin, default pull-high input (Note 1)
Line-in Detector (default), active low.
IO pin, default pull-high input (Note 1)
Volume down (default), active low.
I/O power supply input (2.7~3.3V); Connect to LDO31_VO pin
R-channel analog headphone output
Positive power supply dedicated to CODEC output amplifiers; Connect to
CODEC_VO pin
Headphone common mode output/sense input.
L-channel analog headphone output
Positive power supply/reference voltage for CODEC; Connect to
CODEC_VO pin
Exposed pad as ground
* I: signal input pin
* O: signal output pin
* I/O: signal input/output pin
* P: power pin
Note 1: These button or functions can be setup by IS20XXS_UItool.
Page 8







IS2021 equivalent, schematic
Stereo Audio SoC
Pin No.
11
12
13
14
15
Pin type
I
I
P
O
I/O
Name
AIR
AIL
VDD_CORE
P1_2
P1_3
Description
R-channel single-ended analog inputs
L-channel single-ended analog inputs
Core 1.2V power input; Connect to CLDO_O pin
IO pin, default pull-high input
EEPROM clock SCL
IO pin, default pull-high input
EEPROM data SDA
Pin No.
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
Pin type
I
P
I/O
I
I/O
I/O
I
O
I
P
P
P
P
P
-
P
P
P
P
P
I
-
Name
RST_N
VDD_IO
P0_1
P2_4
P0_4
P1_5
HCI_RXD
HCI_TXD
TEST_EN
CODEC_VO
LDO31_VIN
LDO31_VO
ADAP_IN
BAT_IN
NC
SAR_VDD
SYS_PWR
BK_VDD
BK_LX
BK_O
PWR
NC
Description
System Reset Pin, active when rising edge.
I/O power supply input (2.7~3.3V); Connect to LDO31_VO pin
IO pin, default pull-high input (Note 1)
1. FWD key when class 2 RF, active low.
2. Class1 TX Control signal of external RF T/R switch, active high.
IO pin, default pull-high input
System Configuration,
L: Boot Mode with P2_0 low combination
IO pin, default pull-high input. (Note 1)
1. NFC detection pin, active low.
2. Out_Ind_0
IO pin, default pull-high input (Note 1)
1. NFC detection pin, active low.
2. Out_Ind_0
3. Slide Switch Detector, active low.
4. Buzzer Signal Output
HCI-UART RX data
HCI-UART TX data
Scan chain test enable pin, active high.
3.1V LDO output for CODEC power
3.1V LDO input; Connect to SYS_PWR pin
3.1V LDO output
5V power adaptor input
3.3~4.2V Li-Ion battery input
No Connection
SAR 1.8V input; Connect to BK_O pin
Power Output which come from BAT_IN or ADAP_IN
1.8V buck VDD Power Input; Connect to SYS_PWR pin
1.8V buck pin for switch
1.8V buck feedback input
Multi-Function Push Button and power on key
No Connection
Page 16










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