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PDF ( 数据手册 , 数据表 ) D78F9076

零件编号 D78F9076
描述 UPD78F9076
制造商 NEC
LOGO NEC LOGO 


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D78F9076 数据手册, 描述, 功能
User’s Manual
µPD789074 Subseries
8-Bit Single-Chip Microcontrollers
µPD789071
µPD789072
µPD789074
µPD78F9076www.DataSheet4U.com
µPD789071(A)
µPD789072(A)
µPD789074(A)
Document No. U14801EJ3V0UD00 (3rd edition)
Date Published July 2003 N CP(K)
©
Printed in Japan







D78F9076 pdf, 数据表
Conversions
Data significance:
Higher digits on the left and lower digits on the right
Active low representation: ××× (Overscore over pin or signal name)
Note:
Footnote for item marked Note in the text
Caution:
Information requiring particular attention
Remark:
Supplementary information
Numerical representation: Binary ... ×××× or ××××B
Decimal ... ××××
Hexadecimal ... ××××H
Related Documents
The related documents indicated in this publication may include preliminary versions.
However, preliminary versions are not marked as such.
Documents Related to Devices
µPD789074 Subseries User’s Manual
78K/0S Series Instructions User’s Manual
Document Name
Document No.
This manual
U11047E
Documents Related to Development Tools (Software) (User’s Manuals)
RA78K0S Assembler Package
Document Name
CC78K0S C Compiler
SM78K Series System Simulator Ver. 2.30 or Later
ID78K Series Integrated Debugger Ver. 2.30 or Later
Project Manager Ver. 3.12 or Later (Windows Based)
www.DataSheet4U.com
Document No
Operation
U14876E
Language
U14877E
Structured Assembly Language U11623E
Operation
U14871E
Language
Operation (WindowsTM Based)
U14872E
U15373E
External Parts User Open
Interface Specifications
U15802E
Operation (Windows Based)
U15185E
U14610E
Documents Related to Development Tools (Hardware) (User’s Manuals)
IE-78K0S-NS In-Circuit Emulator
IE-78K0S-NS-A In-Circuit Emulator
IE-789046-NS-EM1 Emulation Board
Document Name
Document No.
U13549E
U15207E
U14433E
Caution The related documents listed above are subject to change without notice. Be sure to use the latest
version of each document for designing.
8 User’s Manual U14801EJ3V0UD







D78F9076 equivalent, schematic
LIST OF FIGURES (2/3)
Figure No.
Title
Page
6-5
6-6
6-7
6-8
6-9
6-10
6-11
6-12
Settings of 16-Bit Timer Mode Control Register 90 for Timer Interrupt Operation............................................89
Timing of Timer Interrupt Operation..................................................................................................................90
Settings of 16-Bit Timer Mode Control Register 90 for Timer Output Operation ..............................................91
Timer Output Timing .........................................................................................................................................91
Settings of 16-Bit Timer Mode Control Register 90 for Capture Operation.......................................................92
Capture Operation Timing (with Both Edges of CPT90 Pin Specified) .............................................................92
16-Bit Timer Counter 90 Readout Timing .........................................................................................................93
Settings of Buzzer Output Control Register 90 for Buzzer Output Operation...................................................94
7-1
7-2
7-3
7-4
7-5
7-6
7-7
7-8
7-9
7-10
Block Diagram of 8-Bit Timer/Event Counter 80...............................................................................................98
Format of 8-Bit Timer Mode Control Register 80 ..............................................................................................99
Format of Port Mode Register 2 .....................................................................................................................100
Interval Timer Operation Timing .....................................................................................................................102
External Event Counter Operation Timing (with Rising Edge Specified) ........................................................103
Square-Wave Output Timing ..........................................................................................................................105
PWM Output Timing .......................................................................................................................................106
Start Timing of 8-Bit Timer Counter 80 ...........................................................................................................107
External Event Counter Operation Timing ......................................................................................................107
Operation Timing After Compare Register Is Rewritten During PWM Output ................................................108
8-1 Block Diagram of Watchdog Timer .................................................................................................................110
8-2 Format of Watchdog Timer Clock Selection Register.....................................................................................111
www.Da8ta-3SheetF4Uor.mcoamt of Watchdog Timer Mode Register.....................................................................................................112
9-1
9-2
9-3
9-4
9-5
9-6
9-7
9-8
9-9
9-10
9-11
Block Diagram of Serial Interface 20 ..............................................................................................................116
Block Diagram of Baud Rate Generator 20 ....................................................................................................117
Format of Serial Operation Mode Register 20 ................................................................................................119
Format of Asynchronous Serial Interface Mode Register 20 ..........................................................................120
Format of Asynchronous Serial Interface Status Register 20.........................................................................122
Format of Baud Rate Generator Control Register 20 .....................................................................................123
Format of Asynchronous Serial Interface Transmit/Receive Data..................................................................133
Asynchronous Serial Interface Transmission Completion Interrupt Timing ....................................................135
Asynchronous Serial Interface Reception Completion Interrupt Timing .........................................................136
Receive Error Timing ......................................................................................................................................137
3-Wire Serial I/O Mode Timing ......................................................................................................................143
10-1
10-2
10-3
Basic Configuration of Interrupt Function .......................................................................................................152
Format of Interrupt Request Flag Register .....................................................................................................154
Format of Interrupt Mask Flag Register ..........................................................................................................155
16 User’s Manual U14801EJ3V0UD










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