DataSheet8.cn


PDF ( 数据手册 , 数据表 ) 74LVX373

零件编号 74LVX373
描述 LOW VOLTAGE CMOS OCTAL D-TYPE LATCH
制造商 STMicroelectronics
LOGO STMicroelectronics LOGO 


1 Page

No Preview Available !

74LVX373 数据手册, 描述, 功能
74LVX373
LOW VOLTAGE CMOS OCTAL D-TYPE LATCH
(3-STATE NON INV.) WITH 5V TOLERANT INPUTS
s HIGH SPEED:
tPD=5.8ns (TYP.) at VCC = 3.3V
s 5V TOLERANT INPUTS
s POWER-DOWN PROTECTION ON INPUTS
s INPUT VOLTAGE LEVEL:
)VIL = 0.8V, VIH = 2V at VCC =3V
t(ss LOW POWER DISSIPATION:
cICC = 4 µA (MAX.) at TA=25°C
us LOW NOISE:
dVOLP = 0.3V (TYP.) at VCC =3.3V
ros SYMMETRICAL OUTPUT IMPEDANCE:
P|IOH| = IOL = 4 mA (MIN) at VCC =3V
s BALANCED PROPAGATION DELAYS:
tetPLH tPHL
les OPERATING VOLTAGE RANGE:
oVCC(OPR) = 2V to 3.6V (1.2V Data Retention)
bss PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 373
- Os IMPROVED LATCH-UP IMMUNITY
t(s)DESCRIPTION
The 74LVX373 is a low voltage CMOS OCTAL
cD-TYPE LATCH with 3 STATE OUTPUT NON
duINVERTING fabricated with sub-micron silicon
rogate and double-layer metal wiring C2MOS
technology. It is ideal for low power, battery
Poperated and low noise 3.3V applications.
teThis 8 bit D-Type latch is controlled by a latch
leenable input (LE) and an output enable input (OE).
oWhile the LE input is held at a high level, the Q
soutputs will follow the data input precisely.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74LVX373MTR
74LVX373TTR
When the LE is taken low, the Q outputs will be
latched precisely at the logic level of D input data.
While the (OE) input is low, the 8 outputs will be in
a normal logic state (high or low logic level) and
while high level the outputs will be in a high
impedance state.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V. It
combines high speed performance with the true
CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
ObFigure 1: Pin Connection And IEC Logic Symbols
August 2004
Rev. 4
1/13







74LVX373 pdf, 数据表
74LVX373
SO-20 MECHANICAL DATA
DIM.
A
MIN.
2.35
mm.
TYP
MAX.
2.65
MIN.
0.093
inch
TYP.
MAX.
0.104
A1 0.1
0.30 0.004
0.012
B 0.33
0.51 0.013
0.020
C 0.23
0.32 0.009
0.013
t(s)D 12.60
13.00
0.496
0.512
cE 7.4
7.6 0.291
0.299
due 1.27
0.050
ProH 10.00
10.65
0.394
0.419
teh 0.25
0.75 0.010
0.030
oleL 0.4
1.27 0.016
0.050
bsk 0°
8° 0°
8°
Obsolete Product(s) - Oddd
0.100
0.004
8/13
0016022D














页数 13 页
下载[ 74LVX373.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
74LVX373Low Voltage Octal Transparent Latch with 3-STATE OutputsFairchild Semiconductor
Fairchild Semiconductor
74LVX373LOW VOLTAGE CMOS OCTAL D-TYPE LATCHSTMicroelectronics
STMicroelectronics
74LVX373MLow Voltage Octal Transparent Latch with 3-STATE OutputsFairchild Semiconductor
Fairchild Semiconductor
74LVX373MTCLow Voltage Octal Transparent Latch with 3-STATE OutputsFairchild Semiconductor
Fairchild Semiconductor

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap