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PDF ( 数据手册 , 数据表 ) 74ALVC32

零件编号 74ALVC32
描述 Quad 2-input OR gate
制造商 NXP Semiconductors
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74ALVC32 数据手册, 描述, 功能
74ALVC32
Quad 2-input OR gate
Rev. 3 — 20 January 2014
Product data sheet
1. General description
The 74ALVC32 is a quad 2-input OR gate.
Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.
2. Features and benefits
Wide supply voltage range from 1.65 V to 3.6 V
3.6 V tolerant inputs/outputs
CMOS low power consumption
Direct interface with TTL levels (2.7 V to 3.6 V)
Power-down mode
Latch-up performance exceeds 250 mA
Complies with JEDEC standards:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74ALVC32D 40 C to +85 C SO14
plastic small outline package; 14 leads;
body width 3.9 mm
74ALVC32PW 40 C to +85 C
TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
74ALVC32BQ 40 C to +85 C
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
Version
SOT108-1
SOT402-1
SOT762-1







74ALVC32 pdf, 数据表
NXP Semiconductors
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Quad 2-input OR gate
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Fig 8. Package outline SOT108-1 (SO14)
74ALVC32
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 January 2014
© NXP B.V. 2014. All rights reserved.
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