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PDF ( 数据手册 , 数据表 ) NT35510

零件编号 NT35510
描述 One-chip Driver IC with internal GRAM
制造商 Novatek
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NT35510 数据手册, 描述, 功能
NT35510 – General Specification
One-chip Driver IC with internal GRAM
for 16.7M colors 480RGB x 864 a-Si TFT LCD
with CPU / RGB / MIPI / MDDI Interface
V0.00
Preliminary
ÁЉ
11/8/2010
1 Version 0.00
With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantability,
fitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any such
information.







NT35510 pdf, 数据表
PRELIMINARY
NT35510
1 DESCRIPTION
1.1 Purpose of this Document
This document has been created to provide complete reference specifications for the NT35510. IC design
engineers should refer to these specifications when designing ICs, test engineers when testing the compliance of
manufactured ICs to guarantee their performance, and application engineers when helping customers to make
sure they are using this IC properly.
1.2 General Description
The NT35510 device is a single-chip solution for a-Si TFT LCD that incorporates gate drivers and is capable of
480RGBx864, 480RGBx854, 480RGBx800, 480RGBx720, 480RGBx640 with internal CGRAM. It includes a
9,953,280 bits internal memory, a timing controller with glass interface level-shifters and a glass power supply
circuit..
The NT35510 supports MDDI interface, MIPI Interface, 16/18/24 bits RGB interface, 8/16/24-bit system interfaces,
serial peripheral interfaces (SPI) and I2C interface. The specified window area can be updated selectively, so that
moving pictures can be displayed simultaneously independent of the still picture area.
The NT35510 is also able to make gamma correction settings separately for RGB dots to allow benign
adjustments to panel characteristics, resulting in higher display qualities. The IC possesses internal GRAM that
stores 480-RGB x 864-dot 16.77M-color images. A deep standby mode is also supported for lower power
consumption.
This LSI is suitable for small or medium-sized portable mobile solutions requiring long-term driving capabilities,
including bi-directional pagers, digital audio players, cellular phones and handheld PDA..
11/8/2010
8 Version 0.00
With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantability,
fitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any such
information.







NT35510 equivalent, schematic
PRELIMINARY
NT35510
4.6 Interface Logic Pins
Symbol
I/O
Description
RESX
This signal will reset the device and must be applied to properly initialize the chip.
Signal is active low.
The input voltage range for RESX pin is related to DSTB_SEL and VSEL pins.
Input Voltage Level (DSTB_SEL=”0”)
Min. Max. Unit
VDDI=1.65~3.3V
Logic High level input voltage
Logic Low level input voltage
0.7xVDDI
VSSI
VDDI
0.3xVDDI
V
V
I
VDDI=1.1~1.3V
Logic High level input voltage
Logic Low level input voltage
0.88
VSSI
1.35 V
0.55 V
TE
(TE_L)
TE_R
IM[3:0]
RGBBP
Input Voltage Level (DSTB_SEL=”1”)
VSEL
=High
VSEL
=Low
Logic High level input voltage
Logic Low level input voltage
Logic High level input voltage
Logic Low level input voltage
VDDI=1.65~3.3V
Min. Max.
0.7xVDDI VDDI
VSSI 0.3xVDDI
0.88 1.35V
VSSI
0.55
VDDIL=1.1~1.3V
Min. Max.
1.155
1.95
VSSI
0.585
0.88 1.35V
VSSI
0.55
Unit
V
V
V
V
Tearing effect output pin to synchronize MCU to frame writing, activated by S/W command.
O When this pin is not activated, this pin is output low.
If not used, please open this pin.
Tearing effect output pin to synchronize MCU to frame writing, activated by S/W command.
O The same output signal as TE (TE_L) pin.
If not used, please open this pin.
Interface type selection. The connections of IM[3:0] which not shown in table are invalid.
IM[3:0]
Display Data
Command
0000 80-series 8-bit MPU I/F, D[7:0] 80-series 8-bit MPU I/F, D[7:0]
0001 80-series 16-bit MPU I/F, D[15:0] 80-series 16-bit MPU I/F, D[15:0]
0010 80-series 24-bit MPU I/F, D[23:0] 80-series 24-bit MPU I/F, D[23:0]
0011 RGB I/F, D[23:0]
16-bit SPI (SCL rising edge trigger), SDI/SDO
1011 RGB I/F, D[23:0]
16-bit SPI (SCL falling edge trigger), SDI/SDO
I
0100
0101
RGB I/F, D[23:0]
MIPI DSI,
HSSI_D0_P/N, HSSI_D1_P/N
I2C I/F, I2C_SDA
MIPI DSI,
HSSI_D0_P/N, HSSI_D1_P/N
0110
MDDI,
HSSI_D0_P/N, HSSI_D1_P/N
MDDI, HSSI_D0_P/N, HSSI_D1_P/N
16-bit SPI (SCL rising edge trigger), SDI/SDO
1110
MDDI,
HSSI_D0_P/N, HSSI_D1_P/N
MDDI, HSSI_D0_P/N, HSSI_D1_P/N
16-bit SPI (SCL falling edge trigger), SDI/SDO
0111
MDDI,
HSSI_D0_P/N, HSSI_D1_P/N
MDDI, HSSI_D0_P/N, HSSI_D1_P/N
I2C I/F, I2C_SDA serial data
Display data written path control in RGB interface.
RGBBP=”0”, display data written to frame memory.
I RGBBP=”1”, display data written to line buffer (frame memory by pass mode)
When not used in other interfaces, please connect to VSSI.
11/8/2010
16 Version 0.00
With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantability,
fitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any such
information.










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