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零件编号 | QD15AL02 | ||
描述 | TFT LCD Module | ||
制造商 | Quanta | ||
LOGO | |||
1 Page
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Quanta Display Inc.
www.panelook.com
Preliminary
Specification
Quanta Display Inc.
SPECIFICATION
QD15AL0201 Page 1 /25
Doc No. QD15AL0201-00
Doc. REV.: 00
Issue Date: 12 / 8/2005
With RoHS
compliant
Specification for TFT LCD Module
Model No.
QD15AL02 Rev.:01
Ƒ Approval By
Customer
ODM
Quanta Display Inc.
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Quanta Display Inc.
6. Electrical Characteristics
6-1.TFT-LCD panel driving
Parameter
Symbol Min.
VDD Supply voltage
VDD +3.0
Current dissipation
IDD
Permissive input ripple voltage VRP
Differential input
Threshold voltage
Terminal resistor
High
Low
VTH
VTL –100
RT
Typ.
+3.3
580
100
Rush current
IRUSH
Note1 VCM : Common mode voltage of LVDS driver.
Note2
On-off conditions for supply voltage
0.5 t1 10 ms
0 t2 50 ms
0 t3 50 ms
400 ms t4
200 ms t5
200 ms t6
VDD
DATA
CCFL
90%
10%
t1
t2
t5
QD15AL0201 Page 8/26
Max.
+3.6
750
100
+100
1.5
Ta 25
Unit Remark
Note2
Note3
mV p-p Vcc=+3.3V
mV VCM=+1.2V
mV Note1
Differential
input
A Rise time
470uS
90% 10%
t4
t3
t6
10%
Vcc-dip conditions
1) 2.5 V Vcc 3.0 V
td 10 ms
2.5V
vcc
3.0V
2) Vcc 2.5 V
td
Vcc-dip conditions should also follow the On-off conditions for supply voltage
Note3 Test pattern of current dissipation
[Full white pattern] VDD=+3.3V
RGBRGBRGBRGBRGBRGB
[Full black pattern] VDD=+3.3V
RGBRGBRGBRGBRGBRGB
RGBRGBRGBRGBRGBRGB RGBRGBRGBRGBRGBRGB
RGBRGBRGBRGBRGBRGB RGBRGBRGBRGBRGBRGB
RGBRGBRGBRGBRGBRGB RGBRGBRGBRGBRGBRGB
RGBRGBRGBRGBRGBRGB RGBRGBRGBRGBRGBRGB
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Quanta Display Inc.
31 1F Blue X Bx=0.167
32 20 Blue Y By=0.161
33 21 White X Wx=0.313
34 22 White Y Wy=0.329
Established Timings
35 23 Established timings 1 (00h if not used)
36 24 Established timings 2 (00h if not used)
Standard Timing ID
37 25 Manufacturer’s timings( 00h if not used)
38 26 Standard timing ID1 (01h if not used)
39 27 Standard timing ID1 (01h if not used)
40 28 Standard timing ID2 (01h if not used)
41 29 Standard timing ID2 (01h if not used)
42 2A Standard timing ID3 (01h if not used)
43 2B Standard timing ID3 (01h if not used)
44 2C Standard timing ID4 (01h if not used)
45 2D Standard timing ID4 (01h if not used)
46 2E Standard timing ID5 (01h if not used)
47 2F Standard timing ID5 (01h if not used)
48 30 Standard timing ID6 (01h if not used)
49 31 Standard timing ID6 (01h if not used)
50 32 Standard timing ID7 (01h if not used)
51 33 Standard timing ID7 (01h if not used)
52 34 Standard timing ID8 (01h if not used)
53 35 Standard timing ID8 (01h if not used)
Timing Descriptor #1
54 36 Pixel Clock(119.23M)/10,000 (LSB)
55 37 Pixel Clock(119.23M)/10,000 (MSB)
56 38 Horizontal Active=1680 pixels
57 39 Horizontal Blanking=160 pixels
58 3A Horizontal Active: Horizontal Blanking
59 3B Vertical Active =1050 lines
60 3C Vertical Blanking=30 lines
61 3D Vertical Active : Vertical Banking
62 3E Horizontal Sync.Offset =48 pixels
63 3F Horizontal Sync.Width=32 pixels
64 40 Vertical Sync. Offset: lines Sync. Width
65 41 Horizontal/Vertical Sync Offset/Width
66 42 Horizontal Image Size=331.2mm
67 43 Vertical Image Size=207mm
QD15AL0201 Page 16/26
2A 00101010
29 00101001
50 01010000
54 01010100
00 00000000
00 00000000
00 00000000
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
93 10010011
2E 00101110
(lower 8 bits)
90 10010000
(lower 8bits)
A0 10100000
(upper 4:4 bits)
60 01100000
(lower 8bits) 1A 00011010
(lower 8bits)
1E 00011110
(upper 4:4 bits)
40 01000000
(lower 8bits)
30 00110000
(lower 8bits)
20 00100000
(lower 4bits)
36 00110110
(upper 2 bits)
00 00000000
(lower 8 bits)
4B 01001011
(lower 8 bits)
CF 11001111
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
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页数 | 26 页 | ||
下载 | [ QD15AL02.PDF 数据手册 ] |
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