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PDF ( 数据手册 , 数据表 ) M170E5-L0E

零件编号 M170E5-L0E
描述 LCD MODULE
制造商 CHI MEI
LOGO CHI MEI LOGO 


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M170E5-L0E 数据手册, 描述, 功能
Global LCD Panel Exchange Center
www.panelook.com
Doc No.:
Issued Date:Sep. 19, 2006
Model No.: M170E5-L0E
Approval
TFT-LCD Approval Specification
MODEL NO.: M170E5-L0E
Customer:
Approved by:
Note:
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2006-09-20
16:42:31 CST
2006-09-19
16:43:06 CST
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Approve by Dept.
Mgr.(QA RA)
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tomy_chen(ຫةԫ
/52720/54140/43150)
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Assignee Accept
Approve by Director Teren_lin(ࣥ෌ո/56910/36064) Director Accept
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M170E5-L0E pdf, 数据表
Global LCD Panel Exchange Center
www.panelook.com
Doc No.:
Issued Date:Sep. 19, 2006
Model No.: M170E5-L0E
Approval
Note (3) The specified power supply current is under the conditions at Vcc = 5.0 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
a. White Pattern
b. Black Pattern
Active Area
Active Area
Note (4) The specified power supply current is under the conditions at Vcc = 4.5 V, Ta = 25 ± 2 ºC, fv = 75
Hz, whereas a power dissipation check pattern (Black Pattern) below is displayed.
Black Pattern
Active Area
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M170E5-L0E equivalent, schematic
Global LCD Panel Exchange Center
www.panelook.com
Doc No.:
Issued Date:Sep. 19, 2006
Model No.: M170E5-L0E
Approval
6.2 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the
conditions shown in the following diagram.
Power Supply
VCC
0.5msdT1d10ms
0dT2d50ms
0dT3d50ms
500msdT4
0V
Signals
0V
0.9 VCC
0.1VCC
T1
T2
Power On
VALID
0.9 VCC
0.1VDD
T3
T4
Power Off
Backlight (Recommended)
450msdT5
90msdT6
50% 50%
T5 T6
Power ON/OFF Sequence
Note.
(1) The supply voltage of the external system for the module input should be the same as the definition of Vcc.
(2) Please apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation of the LCD turns off, the display may, instantly, function abnormally.
(3) In case of VCC = off level, please keep the level of input signals on the low or keep a high impedance.
(4) T4 should be measured after the module has been fully discharged between power on/off periods.
(5) Interface signal shall not be kept at high impedance when the power is on.
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