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PDF ( 数据手册 , 数据表 ) V420H2-LE6

零件编号 V420H2-LE6
描述 TFT LCD Module
制造商 CMI MEI
LOGO CMI MEI LOGO 


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V420H2-LE6 数据手册, 描述, 功能
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
ϭTentative Specification
ϭPreliminary Specification
ϮApproval Specification
MODEL NO.: V420H2
SUFFIX: LE6
Customer:
APPROVED BY
Name / Title
Note
SIGNATURE
Please return 1 copy for your confirmation with your
signature and comments.
Approved By
Chao-Chun Chung
Checked By
Ken Wu
Prepared By
Peggi Chiu
Version 2.0
1 DateΚ21 Feb. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com







V420H2-LE6 pdf, 数据表
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
GND
Vcc rising time is 470us
Vcc
0.9Vcc
0.1Vcc
470us
Note (3) The Specified Power consumption is under XXX pattern.
Note (4) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 120 Hz,
whereas a power dissipation check pattern below is displayed.
Note (5) Even though Inrush current is over the specified value, there is no problem if I2T of fuse spec is
satisfied.
Version 2.0
8 DateΚ21 Feb. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com







V420H2-LE6 equivalent, schematic
Global LCD Panel Exchange Center
www.panelook.com
PRODUCT SPECIFICATION
6 N.C.
7 N.C.
8 N.C.
9 GND
10 CH3[0]-
11 CH3[0]+
12 CH3[1]-
13 CH3[1]+
14 CH3[2]-
15 CH3[2]+
16 GND
17 CH3CLK-
18 CH3CLK+
19 GND
20 CH3[3]-
21 CH3[3]+
22 CH3[4]-
23 CH3[4]+
24 N.C.
25 N.C.
26 CH4[0]-
27 CH4[0]+
28 CH4[1]-
29 CH4[1]+
30 CH4[2]-
31 CH4[2]+
32 GND
33 CH4CLK-
34 CH4CLK+
35 GND
36 CH4[3]-
No Connection
No Connection
No Connection
Ground
Third pixel Negative LVDS differential data input. Pair 0
Third pixel Positive LVDS differential data input. Pair 0
Third pixel Negative LVDS differential data input. Pair 1
Third pixel Positive LVDS differential data input. Pair 1
Third pixel Negative LVDS differential data input. Pair 2
Third pixel Positive LVDS differential data input. Pair 2
Ground
Third pixel Negative LVDS differential clock input.
Third pixel Positive LVDS differential clock input.
Ground
Third pixel Negative LVDS differential data input. Pair 3
Third pixel Positive LVDS differential data input. Pair 3
Third pixel Negative LVDS differential data input. Pair 4
Third pixel Positive LVDS differential data input. Pair 4
NC/GND
NC/GND
Fourth pixel Negative LVDS differential data input. Pair 0
Fourth pixel Positive LVDS differential data input. Pair 0
Fourth pixel Negative LVDS differential data input. Pair 1
Fourth pixel Positive LVDS differential data input. Pair 1
Fourth pixel Negative LVDS differential data input. Pair 2
Fourth pixel Positive LVDS differential data input. Pair 2
Ground
Fourth pixel Negative LVDS differential clock input.
Fourth pixel Positive LVDS differential clock input.
Ground
Fourth pixel Negative LVDS differential data input. Pair 3
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Version 2.0
16 DateΚ21 Feb. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com










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