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PDF ( 数据手册 , 数据表 ) NVD2955

零件编号 NVD2955
描述 Power MOSFET ( Transistor )
制造商 On Semiconductor
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NVD2955 数据手册, 描述, 功能
NTD2955, NVD2955
Power MOSFET
−60 V, −12 A, P−Channel DPAK
This Power MOSFET is designed to withstand high energy in the
avalanche and commutation modes. Designed for low−voltage, high−
speed switching applications in power supplies, converters, and power
motor controls. These devices are particularly well suited for bridge
circuits where diode speed and commutating safe operating areas are
critical and offer an additional safety margin against unexpected
voltage transients.
Features
Avalanche Energy Specified
IDSS and VDS(on) Specified at Elevated Temperature
Designed for Low−Voltage, High−Speed Switching Applications and
to Withstand High Energy in the Avalanche and Commutation Modes
NVD Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
− Continuous
− Non−repetitive (tp 10 ms)
Drain Current
Dr− Continuous @ Ta = 25°C
Dr− Single Pulse (tp 10 ms)
Total Power Dissipation @ Ta = 25°C
Operating and Storage Temperature
Range
VDSS
VGS
VGSM
−60
± 20
± 25
Vdc
Vdc
Vpk
ID
IDM
PD
TJ, Tstg
−12
−18
55
−55 to
175
Adc
Apk
W
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, Peak
IL = 12 Apk, L = 3.0 mH, RG = 25 W)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
EAS
RqJC
RqJA
RqJA
216 mJ
2.73 °C/W
71.4
100
Maximum Lead Temperature for Soldering
Purposes, 1/8 in. from case for
10 seconds
TL
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When surface mounted to an FR4 board using 1 in pad size
(Cu area = 1.127 in2).
2. When surface mounted to an FR4 board using the minimum recommended
pad size (Cu area = 0.412 in2).
http://onsemi.com
V(BR)DSS
−60 V
RDS(on) TYP
155 mW @ −10 V, 6 A
D
ID MAX
−12 A
P−Channel
G
S
4
4
12
3
DPAK
CASE 369C
STYLE 2
1
2
3
IPAK
CASE 369D
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
1
Gate
2
Drain
3
Source
12 3
Gate Drain Source
A
NT2955/NTP2955
NT2955
Y
WW
G
= Assembly Location*
= Device Code (DPAK)
= Device Code (IPAK)
= Year
= Work Week
= Pb−Free Package
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 14
1
Publication Order Number:
NTD2955/D












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