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PDF ( 数据手册 , 数据表 ) T650HVN06.0

零件编号 T650HVN06.0
描述 TFT LCD Module
制造商 AUO
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T650HVN06.0 数据手册, 描述, 功能
Global LCD Panel Exchange Center
www.panelook.com
T650HVN06.0 Product Specification
Rev. 0.0
Model Name: T650HVN06.0
Issue Date : 2012/06/14
( )Preliminary Specification
(Ϡ)Final Specifications
Customer Signature
Date AUO
Date
Approved By
Approval By PM Director
CP Wang
_________________________________ ____________________________________
Note
Reviewed By RD Director
Eugene Chen
____________________________________
Reviewed By Project Leader
TaiYu Chen
____________________________________
Prepared By PM
Fanfan Lee
____________________________________
© Copyright AUO Optronics Corp. 2012 All Rights Reserved.
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T650HVN06.0 pdf, 数据表
Global LCD Panel Exchange Center
www.panelook.com
T650HVN06.0 Product Specification
Rev. 0.0
2. LVDS Receiver Clock SSCG (Spread spectrum clock generator) is defined as below figures
)FONBVV PD[
)66
)FON
)FONBVV PLQ
3. Receiver Data Input Margin
Parameter
Input Clock Frequency
Input Data Position0
Input Data Position1
Input Data Position2
Input Data Position3
Input Data Position4
Input Data Position5
Input Data Position6
Symbol
Fclk
tRIP1
tRIP0
tRIP6
tRIP5
tRIP4
tRIP3
tRIP2
Min
Fclk (min)
-|tRMG|
T/7-|tRMG|
2T/7-|tRMG|
3T/7-|tRMG|
4T/7-|tRMG|
5T/7-|tRMG|
6T/7-|tRMG|
Rating
Type
--
0
T/7
2T/7
3T/7
4T/7
5T/7
6T/7
Max
Fclk (max)
|tRMG|
T/7+|tRMG|
2T/7+|tRMG|
3T/7+|tRMG|
4T/7+|tRMG|
5T/7+|tRMG|
6T/7+|tRMG|
Unit Note
MHz T=1/Fclk
ns
ns
ns
ns
ns
ns
ns
/9'65[
,QSXW 'DWD
/9'65[
,QSXW &ORFN
W5,3
W5,3
W5,3
W5,3
W5,3
W5,3
W5,3
5[ 5[ 5[ 5[ 5[ 5[ 5[ 5[ 5[ 5[ 5[ 5[
9GLII 9
)FON 7
© Copyright AUO Optronics Corp. 2012 All Rights Reserved.
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T650HVN06.0 equivalent, schematic
Global LCD Panel Exchange Center
www.panelook.com
3.7 Backlight Specification
The backlight unit contains 8pcs LED lightbar
3.7.1 Electrical specification
T650HVN06.0 Product Specification
Rev. 0.0
Item
Symbol
Spec
Condition
Min Typ Max
Unit
1 Input Voltage
2 Input Current
3 Input Power
4 Inrush Current
5 On/Off control voltage
VDDB
IDDB
PDDB
IRUSH
VBLON
ON
OFF
- 22.8 24 25.2
VDDB=24V
8.73 9.58
VDDB=24V
209.6 229.9
VDDB=24V -
- 13
VDDB=24V
2
0
- 3.3
- 0.8
VDC
ADC
(rms)
W
ADC
(peak)
VDC
6 On/Off control current
IBLON
7
External PWM
Control Voltage
V_EPWM
MAX
MIN
8
External PWM
Control Current
I_EPWM
9 External PWM Duty ratio
D_EPWM
10
External PWM
Frequency
F_EPWM
11 DET status signal
DET
HI
Lo
VDDB=24V -
- 1.5
VDDB=24V 2
- 3.3
VDDB=24V 0
- 0.8
VDDB=24V - - 2
VDDB=24V 5
- 100
VDDB=24V 140 180 240
VDDB=24V
Open Collector
0 - 0.8
mA
VDC
mADC
%
Hz
VDC
VDC
12 Input Impedance
Rin VDDB=24V 300
Kohm
ΰ к αNote 1: Dimming ratio= 100% (MAX) Ta=25±5 , Turn on for 45minutes
Note 2: Measurement condition Rising time = 20ms (VDDB : 10%~90%);
Note 3: When BLU off ( VDDB = 24V , VBLON = 0V) , IDDB (max) = 0.02A
Note 4: Less than 5% dimming control is functional well and no backlight shutdown happened
Note 5: D_EPWM and F_EPWM are available only at 2D mode
Note 6: Normal : 0~0.8V ; Abnormal : Open collector
Note
-
1
1
2
-
3
-
-
-
-
4, 5
4, 5
6
6
© Copyright AUO Optronics Corp. 2012 All Rights Reserved.
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