DataSheet8.cn


PDF ( 数据手册 , 数据表 ) T550QVD02.0

零件编号 T550QVD02.0
描述 TFT LCD Module
制造商 AUO
LOGO AUO LOGO 


1 Page

No Preview Available !

T550QVD02.0 数据手册, 描述, 功能
T550QVD02.0 Product Specification
Rev 1.0
Model Name: T550QVD02.0
Issue Date : 2013/01/08
( )Preliminary Specifications
()Final Specifications
Customer Signature
Date AUO
Date
Approved By
_________________________________
Approval By PM Director
Jacky Su
____________________________________
Note
Reviewed By RD Director
Eugene CC Chen
____________________________________
Reviewed By Project Leader
Chia Hsuan Lin
____________________________________
Prepared By PM
Joe JJ Shih
____________________________________
© Copyright AU Optronics Corp. 2013 All Rights Reserved.
Page 1 / 35







T550QVD02.0 pdf, 数据表
T550QVD02.0 Product Specification
Rev 1.0
Note :
1. Test Condition:
(1) VDD = 12.0V
(2) Fv = 120Hz
(3) Fclk= 74.25MHz
(4) Temperature = 25
(5) Typ. Input current : White Pattern
Max. Input current: Heavy loading pattern defined by AUO
>> refer to “Section:3.3 Signal Timing Specification, Typical timing”
2. Measurement condition : Rising time = 400us
90%
VDD
GND
10%
400µs
3. Test Condition:
(1) The measure point of VRP is in LCM side after connecting the System Board and LCM.
(2) Under Max. Input current spec. condition.
4. VRCT = 0.9V
5. The measure points of VIH and VIL are in LCM side after connecting the System Board and LCM.
© Copyright AU Optronics Corp. 2013 All Rights Reserved.
Page 8 / 35







T550QVD02.0 equivalent, schematic
T550QVD02.0 Product Specification
Rev 1.0
3.3 SIGNAL TIMING SPECIFICATION
This is the signal timing required at the input of the user connector. All of the interface signal timing should be
satisfied with the following specifications for its proper operation.
Timing Table (DE only Mode)
Signal
Item
Vertical Section
Period
Active
Blanking
Period
Horizontal Section
Active
Blanking
Clock
Frequency
Vertical Frequency
Frequency
Horizontal Frequency
Frequency
Symbol
Tv
Tdisp (v)
Tblk (v)
Th
Tdisp (h)
Tblk (h)
Fclk=1/Tclk
Fv
Fh
Min.
2180
20
274
34
66
94
240
Typ.
2250
2160
90
275
240
35
74.25
120
270
Max
2715
Unit
Th
555 Th
300 Tclk
60
75
122
278.4
Tclk
MHz
Hz
KHz
Notes:
(1) Display position is specific by the rise of DE signal only.
Horizontal display position is specified by the rising edge of 1st DCLK after the rise of 1st DE, is displayed on the
left edge of the screen.
(2)Vertical display position is specified by the rise of DE after a “Low” level period equivalent to eight times of
horizontal period. The 1st data corresponding to one horizontal line after the rise of 1st DE is displayed at the top
line of screen.
(3)If a period of DE “High” is less than 3840 DCLK or less than 2160 lines, the rest of the screen displays black.
(4)The display position does not fit to the screen if a period of DE “High” and the effective data period do not
synchronize with each other.
© Copyright AU Optronics Corp. 2013 All Rights Reserved.
Page 16 / 35










页数 30 页
下载[ T550QVD02.0.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
T550QVD02.0TFT LCD ModuleAUO
AUO

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap