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PDF ( 数据手册 , 数据表 ) UBA2213

零件编号 UBA2213
描述 Half-bridge power IC
制造商 NXP Semiconductors
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UBA2213 数据手册, 描述, 功能
UBA2213
Half-bridge power IC family for CFL lamps
Rev. 2 — 21 November 2011
Product data sheet
1. General description
The UBA2213 family of integrated circuits are a range of high voltage monolithic ICs for
driving Compact Fluorescent Lamps (CFL) in half-bridge configurations. The family is
designed to provide easy integration of lamp loads across a range of burner power and
mains voltages.
2. Features and benefits
2.1 System integration
Integrated half-bridge power transistors
UBA2213A: 220 V; 13.5 ; 0.9 A maximum ignition current
UBA2213B: 220 V; 9 ; 1.35 A maximum ignition current
UBA2213C: 220 V; 6.6 ; 1.85 A maximum ignition current
Integrated bootstrap diode
Integrated high-voltage supply
2.2 General
Adjustable current controlled preheat mode enables the preheat time (tph) to be set
Glow-time control minimizes electrode damage in non-preheat applications
RMS current control
2.3 Fast and smooth light out
Boost with externally controlled timing
Temperature controlled timing during boost state
Smooth transition from boost to burn state
2.4 Burner lifetime
Current controlled preheat with adjustable preheat time
Minimum glow time control to support cold start
Lamp power independent from mains voltage variations
Lamp inductor saturation protection during ignition







UBA2213 pdf, 数据表
NXP Semiconductors
UBA2213
Half-bridge power IC family for CFL lamps
When boost state is ended, transition control is turned on. Vph is disconnected to VSW and
reset. Capacitor CSW is discharged by internal current, the frequency was increased from
fmin to fnom. The transition state ends when the voltage on pin SW (VSW) reaches
0.6 VH(RC).
7.8 Steady state
In the steady state, the RMS current control is active. This control sets the frequency so
that the RMS voltage across the sense resistor (RSENSE) is equal to VO(ref)RMS. This
feature ensures the current through the power switches and through the lamp is constant.
This results in constant IC dissipation and temperature at a fixed ambient temperature.
During one oscillator clock cycle, the voltage on pin SENSE (VSENSE) is squared and
converted into a positive current. This discharge current is added to the capacitor CSW.
During the other oscillator clock cycle, the input of the squarer is connected to the internal
reference voltage VO(ref)RMS. This voltage is squared and converted into a negative
current. This charge current is also added to capacitor CSW. When both currents are
equal, then Equation 4 is true:
Tosc
Tosc
 ----1-----
Tosc
V
S
E
N
S
E2
t
D
T
=
----1-----
Tosc
V
O
ref
R
MS2
D
T
00
Where Tosc equals the operating frequency fosc / 1.
Taking the square root of both sides results in Equation 5:
(4)
Tosc
----1-----
Tosc
V
S
E
N
S
E2
t
D
T
=
0
Tosc
----1-----
Tosc
VOrefRMS2DT
0
or
(5)
RMS VSENSE = VOrefRMS = RSENSE ILSPT
(6)
The internal reference voltage (VO(ref)RMS) and the external RSENSE resistor define the
constant current which flows through the power switches and the lamp.
7.9 Non-overlap time
The non-overlap time is defined as the time when both MOSFETs are not conducting. The
non-overlap time is fixed internally and is fixed at the tno value (see Table 5).
7.10 OverTemperature Protection (OTP)
OTP is active in all states except boost. When the die temperature reaches the OTP
activation threshold (Tth(act)otp), the oscillator is stopped and the power switches
(LSPT/HSPT) are set to the start-up state. When the oscillator is stopped, the DVDT
supply no longer generates the supply current IDVDT. Voltage VDD gradually decreases
and the start-up state is entered as described in Section 7.2 on page 5. OTP is reset when
the temperature < Tth(rel)otp.
UBA2213
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 21 November 2011
© NXP B.V. 2011. All rights reserved.
8 of 21







UBA2213 equivalent, schematic
NXP Semiconductors
12. Package outline
DIP8: plastic dual in-line package; 8 leads (300 mil)
UBA2213
Half-bridge power IC family for CFL lamps
SOT97-1
D
L
Z
e
b
8
A2 A
A1
wM
b1
b2
5
pin 1 index
E
ME
c
(e 1)
MH
14
0 5 10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1 A2
min. max.
b
b1 b2
c
D (1)
E (1)
e
e1
L
ME MH
w
Z (1)
max.
mm
4.2
0.51
3.2
1.73
1.14
0.53
0.38
1.07 0.36
0.89 0.23
9.8
9.2
6.48
6.20
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
1.15
inches 0.17
0.02
0.13
0.068 0.021 0.042 0.014
0.045 0.015 0.035 0.009
0.39
0.36
0.26
0.24
0.1
0.3
0.14
0.12
0.32
0.31
0.39
0.33
0.01 0.045
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
OUTLINE
VERSION
SOT97-1
IEC
050G01
REFERENCES
JEDEC
JEITA
MO-001
SC-504-8
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-13
Fig 9. Package outline SOT97-1 (DIP8)
UBA2213
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 21 November 2011
© NXP B.V. 2011. All rights reserved.
16 of 21










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