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PDF ( 数据手册 , 数据表 ) NOIL1SM0300A-QDC

零件编号 NOIL1SM0300A-QDC
描述 LUPA300 CMOS Image Sensor
制造商 ON Semiconductor
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NOIL1SM0300A-QDC 数据手册, 描述, 功能
NOIL1SM0300A
LUPA300 CMOS Image
Sensor
Features
640(H) x 480(V) Active Pixels (VGA Resolution)
9.9 mm x 9.9 mm Square Pixels (Based on the High-Fill Factor
Active Pixel Sensor Technology of FillFactory (US patent No.
6,225,670 and others)).
Optical Format: 1/2 Optical Inch
Pixel Rate of 80 MHz
Frame Rate: 250 fps at Full Resolution
On-Chip 10 bit ADCs
Global Shutter
Subsampling (Y Direction)
Serial Pheripheral Interface (SPI)
Programmable Read Out Direction (X and Y)
Random Programmable Windowing
Power Dissipation: 190 mW
48-pin LCC Package
These Devices are PbFree and are RoHS Compliant
http://onsemi.com
Applications
Machine Vision
Motion Tracking
Figure 1. LUPA300 Package Photo
Overview
This document describes the interfacing and driving of the LUPA300 image sensor. The pixel size and resolution result in a
6.3 mm x 4.7 mm optical active area (1/2 inch).
This VGA-resolution CMOS active pixel sensor features global shutter and a maximal frame rate of 250 fps in full
resolution, where integration during readout is possible. The readout speed can be boosted by means of subsampling and
windowed Region Of Interest (ROI) readout. High dynamic range scenes can be captured using the double and multiple slope
functionality. User programmable row and column start/stop positions allow windowing. subsampling reduces resolution
while maintaining the constant field of view and an increased frame rate. The programmable gain and offset amplifier maps
the signal swing to the ADC input range. A 10-bit ADC converts the analog data to a 10-bit digital word stream. The sensor
uses a 3-wire Serial-Parallel (SPI) interface. It operates with a 3.3 V and 2.5 V power supply and requires only one master
clock for operation up to 80 MHz pixel rate. It is housed in an 48-pin ceramic LCC package.
The sensor is available in a monochrome version or Bayer (RGB) patterned color filter array.
This data sheet allows the user to develop a camera-system based on the described timing and interfacing.
ORDERING INFORMATION
Marketing Part Number
NOIL1SM0300A-QDC
NOIL1SE0300A-QDC
NOIL1SM0300A-WWC
Description
Mono with Glass
Color micro lens with Glass
Mono Wafer Sales
NOTE: For more information, see Ordering Code Information on page 27.
Package
48 pin LCC
Wafer Sales
© Semiconductor Components Industries, LLC, 2013
February, 2013 Rev. 10
1
Publication Order Number:
NOIL1SM0300A/D







NOIL1SM0300A-QDC pdf, 数据表
NOIL1SM0300A
Programmable Gain
The amplification inside the PGA is controlled by three
SPI settings:
The PGA gain selection: 16 gain steps are selectable by
means of the GAIN_PGA<3:0> register. Selection word
0000 corresponds with gain 1.32 and selection word 1111
corresponds with gain 15.5. Table 6 gives the 16 gain
settings.
The unity gain selection of the PGA is done by the
UNITY_PGA setting. If this bit is high, the GAIN_PGA
settings are ignored.
The SEL_UNI setting is used to have more gain steps. If
this bit is low, the signal is divided by two before entering the
PGA. GAIN_PGA and UNITY_PGA settings are applied
afterwards. If the SEL_UNI bit is high, there is a unity feed
through to the PGA. This allows having a total gain range of
0.5 to 16 in 32 steps.
The amplification in the PGA is done around a pivoting
point, set by Vcal as illustrated in Figure 8. The VCAL<7:0>
setting is used to apply the Vcal voltage through an on chip
DAC
Vcal
range of the ADC can be used. In this example, Vcal is set
at 1.75V (the maximum input range of the ADC) to make
sure the spread on the black level is still inside the range of
the ADC after amplification. The result after amplification
is the purple histogram.
Table 6. GAIN SETTINGS
GAIN_PGA<3.0>
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Gain
1.32
1.56
1.85
2.18
2.58
3.05
3.59
4.22
4.9
5.84
6.84
8.02
9.38
11.2
13.12
15.38
0.75V
1.45V 1.65V
1.75V
Volts
Figure 8. Effect on Histogram of PGA (gain = 4)
(Vcal is the green line)
Figure 9 continues on the example in the section, Offset
Regulation. The blue histogram is the histogram of the
image after the column amplifiers. With offset regulation an
offset of 200 mV is added to bring the signal in range of the
ADC. The black level of 1.45V is shifted to 1.65V.
The red and blue histograms have a swing of 100 mV. This
means the input range of the ADC is not completely used. By
amplifying the signal with a factor 10 by the PGA, the full
Vcal
Volts
Figure 9. Example of PGA Operation
http://onsemi.com
8







NOIL1SM0300A-QDC equivalent, schematic
NOIL1SM0300A
2ADC Calibration Word <32:0>
The calibration word for the ADCs is distributed over
three registers (13, 14 and 15). These registers all have their
default value and changing this value is not recommended.
The default register values are:
calib_adc<11:0>: 101011011111
calib_adc<23:12>: 011011011011
calib_adc<32:24>: 000011011011
Data Interface (SPI)
The serial-3-wire interface (or Serial-to-Parallel
Interface) uses a serial input to shift the data in the register
buffer. When the complete data word is shifted into the
register buffer the data word is loaded into the internal
register where it is decoded.
Figure 12. SPI Schematic
The timing of the SPI register is explained in the timing
diagram below
SPI _C LK
20 MHz
Upload
SPI _IN
b<15>
b<14>    b< 13>    b<12>    b<11>    b< 10>    b<9>     b<8>b<7>     b<6>     b<5>    b< 4>    b<3> b<2>    b< 1>    b<0> dummy
MSB----------------Address bits-------------LSB
MSB-------------------------------------------------------------------------------------D--ata bits-----------------------------------------------------------------------------L--S- B
b<15>
PI_EN ABLE
Figure 13. Timing of the SPI
b< 14>     b<13>
SPI_IN (15:12): Address bits
SPI_IN (11:0): Data bits
When SPI_ENABLE is asserted the parallel data is loaded
into the internal registers of the LUPA300. The frequency of
SPI_CLK is 20 MHz or lower. The SPI bits have a default
value that allows the sensor to be read out at full resolution
without uploading the SPI bits.
http://onsemi.com
16










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