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PDF ( 数据手册 , 数据表 ) AD9142

零件编号 AD9142
描述 Digital-to-Analog Converter
制造商 Analog Devices
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AD9142 数据手册, 描述, 功能
Data Sheet
Dual, 16-Bit, 1600 MSPS, TxDAC+
Digital-to-Analog Converter
AD9142
FEATURES
Very small inherent latency variation: <2 DAC clock cycles
Proprietary low spurious and distortion design
6-carrier GSM ACLR = 79 dBc at 200 MHz IF
SFDR > 85 dBc (bandwidth = 300 MHz) at ZIF
Flexible 16-bit LVDS interface
Supports word and byte load
Multiple chip synchronization
Fixed latency and data generator latency compensation
Selectable 2×, 4×, 8× interpolation filter
Low power architecture
fS/4 power saving coarse mixer
Input signal power detection
Emergency stop for downstream analog circuitry
protection
FIFO error detection
On-chip numeric control oscillator allows carrier placement
anywhere in the DAC Nyquist bandwidth
Transmit enable function for extra power saving
High performance, low noise PLL clock multiplier
Digital gain and phase adjustment for sideband suppression
Digital inverse sinc filter
Supports single DAC mode
Low power: 2.0 W at 1.6 GSPS, 1.7 W at 1.25 GSPS, full
operating conditions
72-lead LFCSP
APPLICATIONS
Wireless communications: 3G/4G and MC-GSM base stations,
wideband repeaters, software defined radios
Wideband communications: point-to-point, LMDS/MMDS
Transmit diversity/MIMO
Instrumentation
Automated test equipment
GENERAL DESCRIPTION
The AD9142 is a dual, 16-bit, high dynamic range digital-to-
analog converter (DAC) that provides a sample rate of 1600 MSPS,
permitting a multicarrier generation up to the Nyquist frequency.
The AD9142 TxDAC+® includes features optimized for direct
conversion transmit applications, including complex digital mod-
ulation, input signal power detection, and gain, phase, and offset
compensation. The DAC outputs are optimized to interface
seamlessly with analog quadrature modulators, such as the
ADL537x F-MOD series and the ADRF670x series from Analog
Devices, Inc. A 3-wire serial port interface provides for the pro-
gramming/readback of many internal parameters. Full-scale
output current can be programmed over a range of 9 mA to 33 mA.
The AD9142 is available in a 72-lead LFCSP.
PRODUCT HIGHLIGHTS
1. Advanced low spurious and distortion design techniques
provide high quality synthesis of wideband signals from
baseband to high intermediate frequencies.
2. Very small inherent latency variation simplifies both software
and hardware design in the system. It allows easy multichip
synchronization for most applications.
3. New low power architecture improves power efficiency
(mW/MHz/channel) by 30%.
4. Input signal power and FIFO error detection simplify
designs for downstream analog circuitry protection.
5. Programmable transmit enable function allows easy design
balance between power consumption and wakeup time.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices foritsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One T echnology Wa y, P .O. Box 9 106, Norwood, M A 02 062-9106, U .S.A.
Tel: 781.329.4700
©2012 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
http://www.Datasheet4U.com







AD9142 pdf, 数据表
AD9142
Data Sheet
Parameter
NOISE SPECTRAL DENSITY (NSD)
fDAC = 737.28 MSPS
fDAC = 983.04 MSPS
fDAC = 1228.8 MSPS
fDAC = 1474.56 MSPS
W-CDMA ADJACENT CHANNEL LEAKAGE RATIO (ACLR)
fDAC = 983.04 MSPS
fDAC = 1228.8 MSPS
fDAC = 1474.56 MSPS
W-CDMA SECOND (ACLR)
fDAC = 983.04 MSPS
fDAC = 1228.8 MSPS
fDAC = 1474.56 MSPS
Test Conditions/Comments
Eight-tone, 500 kHz tone spacing
fOUT = 200 MHz
fOUT = 200 MHz
fOUT = 280 MHz
fOUT = 10 MHz
fOUT = 280 MHz
Single carrier
fOUT = 200 MHz
fOUT = 20 MHz
fOUT = 280 MHz
fOUT = 20 MHz
fOUT = 280 MHz
Single carrier
fOUT = 200 MHz
fOUT = 20 MHz
fOUT = 280 MHz
fOUT = 20 MHz
fOUT = 280 MHz
Min Typ Max Unit
−160
−161.5
−164.5
−166
−162.5
dBm/Hz
dBm/Hz
dBm/Hz
dBm/Hz
dBm/Hz
81 dBc
83 dBc
80 dBc
81 dBc
80 dBc
85 dBc
86 dBc
86 dBc
86 dBc
85 dBc
OPERATING SPEED SPECIFICATIONS
Table 6.
Interpolation
Factor
DVDD18, CVDD18 = 1.8 V ± 5%
fINTERFACE (Mbps) Max fDAC (Mbps) Max
250 500
250 1000
187.5
1500
DVDD18, CVDD18 = 1.8 V ± 2% or 1.9 V ± 5%
fINTERFACE (Mbps) Max
fDAC (Mbps) Max
250 500
250 1000
200 1600
Rev. 0 | Page 8 of 64







AD9142 equivalent, schematic
AD9142
250
CVDD18 PLL OFF
AVDD33
CVDD18 PLL ON
200
150
100
50
0
0 200 400 600 800 1000 1200 1400 1600
fDAC (MHz)
Figure 27. CVDD18, AVDD33 Current vs. fDAC
Data Sheet
Rev. 0 | Page 16 of 64










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