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PDF ( 数据手册 , 数据表 ) ADV7513

零件编号 ADV7513
描述 Low-Power HDMI 1.4a Transmitter HARDWARE USERS GUIDE
制造商 Analog Devices
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ADV7513 数据手册, 描述, 功能
ADV7513
Low-Power HDMI 1.4a Transmitter
HARDWARE USER’S
GUIDE
- Revision 0 –
November 2011
Rev. 0| Page 1 of 46
http://www.Datasheet4U.com







ADV7513 pdf, 数据表
ADV7513
HARDWARE USER’S GUIDE
Rev.0
1.2 Overview
The ADV7513 is a high speed High Definition Multimedia Interface (HDMI) transmitter that is capable of supporting
an input data rate up to 165MHz (1080p @ 60Hz, UXGA @ 60Hz). Careful hardware design (schematics and PCB
layout) is recommended to optimize the performance and to ensure HDMI compliance.
▷ The ADV7513 Programming Guide and ADV7513 Software Driver User Guide are also available if required.
1.3 Hardware Features
■ HDMI v1.4 features supported
3D video
Advanced Colorimetry
sYCC601
Adobe RGB
Adobe YCC601
■ Operation up to 165MHz (TMDS link frequency)
■ Integrated CEC support with 3 message buffers
■ Supports x.v.Color™ (Gamut Metadata)
■ Internal HDCP key storage
■ Interrupt (INT) output pin eliminates constant I2C monitoring
■ Supports I2S, S/PDIF and HBR audio input formats
■ No audio Master Clock (MCLK) required for audio
■ Requires 1.8V and 3.3V supply
■ EDID buffered on chip
■ Color Space Converter (CSC) with video range clipping
■ 64-lead LQFP package
■ -25°C to +85°C temperature range
1.4 Supported Input Formats
■ 24 bit RGB 4:4:4 (separate syncs)
■ 24 bit YCbCr 4:4:4 (separate syncs)
■ 24, 20, or 16 bit YCbCr 4:2:2 (embedded or separate syncs)
■ 12, 10, or 8 bit YCbCr 4:2:2 (2x pixel clock with embedded or separate syncs)
■ 12, 10, or 8 bit YCbCr 4:2:2 (DDR with embedded or separate syncs)
1.5 Supported Output Formats
■ 24 bit RGB 4:4:4
■ 24 bit YCbCr 4:4:4
■ 24 bit YCbCr 4:2:2
Rev. 0 | Page 8 of 46







ADV7513 equivalent, schematic
ADV7513
HARDWARE USER’S GUIDE
Rev.0
SECTION 5: PIN AND PACKAGE INFORMATION
This section shows the pinout of the ADV7513 64-lead LQFP package. This section also contains a brief description of the
different pins as well as the mechanical drawings
Figure 5 64-lead LQFP configuration (top view - not to scale)
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
DVDD 1
VSYNC 2
SPDIF 3
MCLK 4
I2S0 5
I2S1 6
I2S2 7
I2S3 8
SCLK 9
LRCLK 10
DVDD 11
PVDD 12
BGVDD 13
R_EXT 14
AVDD 15
HPD 16
PIN 1
ADV7513
TOP VIEW
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
48 D12
47 D13
46 D14
45 D15
44 D16
43 D17
42 D18
41 D19
40 D20
39 D21
38 D22
37 D23
36 SDA
35 SCL
34 DDCSDA
33 DDCSCL
Rev. 0 | Page 16 of 46










页数 46 页
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