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PDF ( 数据手册 , 数据表 ) 74VHC1G50

零件编号 74VHC1G50
描述 Noninverting Buffer / CMOS Logic Level Shifter
制造商 First Silicon
LOGO First Silicon LOGO 


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74VHC1G50 数据手册, 描述, 功能
SEMICONDUCTOR
TECHNICAL D ATA
FC74VHC1G50
Noninverting Buffer / CMOS Logic Level Shifter
FC74VHC1G50 is a single gate noninverting buffer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.
The FC74VHC1G50 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage.
This allows the 74VHC1G50 to be used to interface 5 V circuits to 3 V circuits.
High Speed: t PD = 3.5 ns (Typ) at V CC = 5 V
Low Power Dissipation: I CC = 2 uA (Max) at TA = 25°C
TTL–Compatible Inputs: V IL = 0.8 V; V IH = 2.0 V
CMOS–Compatible Outputs: V OH > 0.8 V CC ;
V OL < 0.1 V CC @Load
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 104; Equivalent Gates = 26
5
4
1
2
3
SC–70/SC–88A/SOT–353
DF SUFFIX
MARKING DIAGRAMS
VLd
Pin 1
d = Date Code
PIN ASSIGNMENT
1 NC
2 IN A
3 GND
4 OUT Y
5 V CC
Figure 1. Pinout (Top View)
Figure 2. Logic Symbol
201.09. 23
Revision No : 0
FUNCTION TABLE
Inputs
A
L
H
Output
Y
L
H
1/4
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