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PDF ( 数据手册 , 数据表 ) PZ5032-10A44

零件编号 PZ5032-10A44
描述 32 Macrocell PLD
制造商 INTEGRATED CIRCUIT ENGINEERING
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PZ5032-10A44 数据手册, 描述, 功能
Construction Analysis
Philips PZ5032-10A44
32 Macrocell PLD
Report Number: SCA 9611-501
®
INTEGRATED CIRCUIT ENGINEERING CORPORATION
15022 N. 75th Street • Scottsdale, AZ 85260-2476
Telephone: 602-998-9780 • Fax: 602-948-1925
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PZ5032-10A44 pdf, 数据表
ANALYSIS RESULTS II (continued)
• Metal patterning: All metal layers were patterned by a dry etch of normal quality.
No problems were found in this area.
• Metal defects: No voiding, notching, or neckdown was noted in any of the metal
layers. All tungsten plugs were completely filled. No silicon nodules were noted
following the removal of any metal layer. Slotted metal bus lines were used to
relieve stress.
• Metal step coverage: Virtually no metal thinning was present at any contacts or vias
due to the presence of tungsten plugs.
• Interlevel dielectric consisted of four layers of silicon-dioxide with a planarizing
glass (probably SOG) layer in between glasses 2 and 4. No problems were found
in any of these layers. An etchback was performed prior to the deposition of the
filler glass.
• Pre-metal dielectric: A layer of reflow glass (probably BPSG) over various
densified oxides was used under metal 1. Reflow was performed prior to contact
cuts only. No problems were found.
• Vias and contacts: Via and contact cuts were defined by a dry etch process. No
significant over-etching of the contacts or vias was noted. The titanium-nitride
barrier metal was present beneath the tungsten plugs.
• A single layer of polycide (tungsten silicide) was used to form all gates on the die
and the top plates of all poly-to-diffusion capacitors. Direct poly-to-diffusion
(buried) contacts were not used. Definition was by dry-etch of normal quality and
no problems were found.
• Standard implanted N+ and P+ diffusions formed the sources/drains of the CMOS
transistors and a shallow light implant in capacitor areas of the EEPROM cells. An
-6-
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PZ5032-10A44 equivalent, schematic
Philips PZ5032
Integrated Circuit Engineering Corporation
Figure 1. Optical views of the package. Mag. 4x.
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PZ5032-10A4432 Macrocell PLDINTEGRATED CIRCUIT ENGINEERING
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