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PDF ( 数据手册 , 数据表 ) SPC560B44L5

零件编号 SPC560B44L5
描述 32-bit MCU family built on the Power Architecture embedded category
制造商 ST Microelectronics
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SPC560B44L5 数据手册, 描述, 功能
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SPC560B40x, SPC560B44x, SPC560B50x
SPC560C40x, SPC560C44x, SPC560C50x
32-bit MCU family built on the Power Architecture® embedded
category for automotive body electronics applications
Features
High-performance 64 MHz e200z0h CPU
– 32-bit Power Architecture® technology
– Up to 60 DMIPs operation
– Variable length encoding (VLE)
Memory
– Up to 512 Kbytes Code Flash, with ECC
– 64 Kbytes Data Flash, with ECC
– Up to 48 Kbytes SRAM, with ECC
– 8-entry memory protection unit (MPU)
Interrupts
– 16 priority levels
– Non-maskable interrupt (NMI)
– Up to 34 ext. int. including 18 wakeup lines
GPIO: QFP64/45, QFP100/75, QFP144/123
Timer units
– 6-channel 32-bit periodic interrupt timers
– 4-channel 32-bit system timer module
– System watchdog timer
– Real-time clock timer
16-bit counter time-triggered I/Os
– Up to 56 channels with PWM/MC/IC/OC
– ADC diagnostic via CTU
Communications interface
– Up to 6 FlexCAN interfaces (2.0B active)
with 64-message objects each
– Up to 4 LINFlex/UART
– 3 DSPI / I2C
Table 1. Device summary
LQFP100 (14 x 14 x 1.4 mm)
LQFP144 (20 x 20 x 1.4 mm)
LQFP64 (10 x 10 x 1.4 mm)
10-bit A/D converter with up to 36 channels
– Up to 64 channels via external multiplexing
– Individual conversion registers
– Cross triggering unit
Dedicated diagnostic module for lighting
– Advanced PWM generation
– Time-triggered diagnostic
– PWM-synchronized ADC measurements
Clock generation
– 4 to 16 MHz fast external crystal oscillator
– 32 KHz slow external crystal oscillator
– 16 MHz fast internal RC oscillator
– 128 kHz slow internal RC oscillator
– Software-controlled FMPLL
– Clock monitoring unit
Exhaustive debugging capability
– Nexus1 on all devices
– Nexus2+ available on emulation package
Low power capabilities
– Ultra-low power standby with RTC, SRAM
and CAN monitoring
– Fast wakeup schemes
Operating temp. range up to -40 to 125 °C
Single 5 V or 3.3 V supply
Package
256 Kbyte code Flash
384 Kbyte code Flash
512 Kbyte code Flash
LQFP144 SPC560B40L5 — SPC560B44L5 — SPC560B50L5 —
LQFP100 SPC560B40L3 SPC560C40L3 SPC560B44L3 SPC560C44L3 SPC560B50L3 SPC560C50L3
LQFP64
SPC560B40L1 SPC560C40L1
LBGA208(1)
— SPC560B50L1 SPC560C50L1
— SPC560B50B2 —
1. LBGA208 available only as development package for Nexus2+
July 2010
Doc ID 14619 Rev 7
1/113
www.st.com
1







SPC560B44L5 pdf, 数据表
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Table 2. SPC560Bx and SPC560Cx device comparison(1)
Device
Feature
SPC560 SPC560 SPC560 SPC560 SPC560 SPC560 SPC560 SPC560 SPC560 SPC560 SPC560 SPC560 SPC560 SPC560
B40L1 B40L3 B40L5 C40L1 C40L3 B44L3 B44L5 C44L3 B50L1 B50L3 B50L5 C50L1 C50L3 B50B2
CPU
Execution
speed(2)
Code Flash
Data Flash
RAM
MPU
ADC
CTU
Total timer
I/O(3)
eMIOS
– PWM + MC +
IC/OC(4)
– PWM +
IC/OC(4)
– IC/OC(4)
SCI (LINFlex)
SPI (DSPI)
CAN
(FlexCAN)
I2C
32 kHz
oscillator
12 ch,
10-bit
12 ch,
16-bit
2 ch
10 ch
0 ch
2
256 KB
24 KB
32 KB
28 ch, 36 ch, 8 ch, 28 ch,
10-bit 10-bit 10-bit 10-bit
28 ch, 56 ch, 12 ch, 28 ch,
16-bit 16-bit 16-bit 16-bit
5 ch 10 ch 2 ch 5 ch
20 ch 40 ch
3 ch
3(5)
6 ch
3
2(6)
10 ch
0 ch
2
5
20 ch
3 ch
3
6
e200z0h
Static – up to 64 MHz
384 KB
64 KB (4 × 16 KB)
28 KB
40 KB
8-entry
28 ch, 36 ch, 28 ch, 12 ch,
10-bit 10-bit 10-bit 10-bit
Yes
28 ch, 56ch, 28 ch, 12 ch,
16-bit 16-bit 16-bit 16-bit
5 ch 10 ch 5 ch 2 ch
20 ch
3 ch
40 ch
6 ch
20 ch
3 ch
33
3(7) 6
1
Yes
10 ch
0 ch
4
2
512 KB
32 KB
28 ch, 36 ch, 8 ch,
10-bit 10-bit 10-bit
28 ch, 56 ch, 12 ch,
16-bit 16-bit 16-bit
5 ch 10 ch 2 ch
20 ch
3 ch
40 ch
6 ch
10 ch
0 ch
3
3(7)
2
5
48 KB
28 ch, 36 ch,
10-bit 10-bit
28 ch, 56 ch,
16-bit 16-bit
5 ch 10 ch
20 ch
3 ch
40 ch
6 ch
3
6







SPC560B44L5 equivalent, schematic
3.2
Table 4.
Port
pin
PA[0]
PA[1]
PA[2]
PA[3]
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Pin muxing
Table 4 defines the pin list and muxing for this device.
Each entry of Table 4 shows all the possible configurations for each pin, via the alternate functions. The default function assigned
to each pin after reset is indicated by AF0.
Functional port pin descriptions
PCR
register
Alternate
function(1)
Function
PCR[0]
PCR[1]
PCR[2]
PCR[3]
AF0
AF1
AF2
AF3
AF0
AF1
AF2
AF3
AF0
AF1
AF2
AF3
AF0
AF1
AF2
AF3
GPIO[0]
E0UC[0]
CLKOUT
WKUP[19](4)
GPIO[1]
E0UC[1]
NMI(5)
WKUP[2](4)
GPIO[2]
E0UC[2]
WKUP[3](4)
GPIO[3]
E0UC[3]
EIRQ[0]
Peripheral
I/O Pad RESET
direction(2) type config.
SIUL
eMIOS0
CGL
WKPU
SIUL
eMIOS0
WKPU
WKPU
SIUL
eMIOS0
WKPU
SIUL
eMIOS0
SIUL
I/O
I/O
O M Tristate
I
I/O
I/O
S Tristate
I
I
I/O
I/O
— S Tristate
I
I/O
I/O
— S Tristate
I
LQFP
64
5
4
3
43
Pin No.
LQFP
100
LQFP
144
12 16
7 11
59
68 90
LBGA
208(3)
G4
F3
F2
K15










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