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PDF ( 数据手册 , 数据表 ) G916-470TOU

零件编号 G916-470TOU
描述 LDO Regulators
制造商 Global Mixed-mode Technology
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G916-470TOU 数据手册, 描述, 功能
Global Mixed-mode Technology Inc.
G916
300mA High PSRR, Low Noise, LDO Regulators
Features
„ Low, 90µA No-Load Supply Current
„ Guaranteed 300mA Output Current
„ Dropout Voltage is 200mV @ 150mA Load
„ PSRR=65dB @ 120Hz; 55dB @ 1kHz
„ Over-Temperature Protection and Short-Circuit
Protection
„ Fixed Mode: 1.20V~5.00V (G916-XXX)
„ Adjustable Mode: from 1.25V to 5.50V (G916)
„ Max. Supply Current in Shutdown Mode < 1µA
„ Low Output Noise at 28µVRMS with bypass Ca-
pacitor
„ Stable with low cost ceramic capacitors
Applications
„ Notebook Computers
„ Cellular Phones
„ PDAs
„ Digital still Camera and Video Recorders
„ Hand-Held Devices
„ Audio Codec
General Description
The G916 series is a low supply current, high PSRR,
low noise, and low dropout linear regulator that comes
in a space saving TSOT-23-5, SOT-23-5 package.
The supply current at no-load is 90µA. In the shutdown
mode, the maximum supply current is less than 1µA.
Operating voltage range is from 2.5V to 6.0V. The
over-current protection limit is set at 550mA typical. An
over- temperature protection circuit is built-in in the
Device to prevent thermal overload. These power
saving features make the G916 series ideal for use in
the battery-powered applications such as notebook
computers, cellular phones, and PDAs.
The G916 has two modes of operation. When the SET
pin is connected to ground, its output is a pre-set value:
3.3V. There is no external component needed. When an
output other than the preset value is needed, two ex-
ternal resistors should be used as a voltage divider. The
output voltage is then adjusted by the resistor ratio.
G916-XXX is with fixed-mode output. The output voltage
range is from 1.2V to 5.0V.
Pin Configuration
IN 1
5 OUT
GND 2
www.DataSheet4U.com
SHDN 3
G916
4 SET
SOT-23-5TSOT-23-5
BATTERY 1CµINF
IN OUT
G916
SET
SHDN
GND
R1
R2
OUTPUT
VOLTAGE
1CµOFUT
Adjustable mode
IN 1
5 OUT
GND 2 G916-XXX
SHDN 3
4 BYP
SOT-23-5TSOT-23-5
Ver: 1.7
Jan 25, 2006
CIN
BATTERY _ 1µF
IN OUT
G916-XXX
SHDN
BYP
GND
OUTPUT
VOLTAGE
CBYP
10nF
COUT
1µF
Fixed mode
TEL: 886-3-5788833
http://www.gmt.com.tw
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G916-470TOU pdf, 数据表
Global Mixed-mode Technology Inc.
Pin Description
G916
PIN
G916 G916-XXX
11
22
33
4
4
55
NAME
FUNCTION
IN
GND
SHDN
SET
BYP
OUT
Regulator Input. Supply voltage can range from +2.5V to +6.0V. Bypass with 1µF to GND
Ground. This pin also functions as a heatsink. Solder to large pads or the circuit board
ground plane to maximize thermal dissipation.
Active-Low Shutdown Input. A logic low reduces the supply current to less than 1µA. Connect to IN
for normal operation.
Feedback Input for Setting the Output Voltage. Connect to GND to set the output voltage to
the preset output voltage. Connect to an external resistor divider for adjustable-output op-
eration.
This is a reference bypass pin. It should connect external 10nF capacitor to GND to reduce
output noise. Bypass capacitor must be no less than 1nF. (CBYP1nF)
Regulator Output. Sources up to 300mA. Bypass with a 1µF, 0.2Ω typical ESR capacitor
to GND.
Detailed Description
The block diagram of the G916 is shown in Figure 1. It
consists of an error amplifier, 1.25V bandgap reference,
PMOS output transistor, internal feedback voltage divider,
mode comparator, shutdown logic, over current protec-
tion circuit, and over temperature protection circuit.
The mode comparator compares the SET pin voltage
with an internal 350mV reference. If the SET pin volt-
age is less than 350mV, the internal feedback voltage
divider’s central tap is connected to the non-inverting
input of the error amplifier. The error amplifier com-
pares non-inverting input with the 1.25V bandgap ref-
erence. If the feedback voltage is higher than 1.25V,
the error amplifier’s output becomes higher so that the
PMOS output transistor has a smaller gate-to-source
voltage (VGS). This reduces the current carrying capa-
bility of the PMOS output transistor, as a result the
www.DaotauStpheuet t4vUol.tcaogme decreases until the feedback voltage is
equal to 1.25V. Similarly, when the feedback voltage is
less than 1.25V, the error amplifier causes the output
PMOS to source more current to pull the feedback
voltage up to 1.25V. Thus, through this feedback ac-
tion, the error amplifier, output PMOS, and the voltage
dividers effectively form a unity-gain amplifier with the
feedback voltage force to be the same as the 1.25V
bandgap reference. The output voltage, VOUT, is then
given by the following equation:
VOUT = 1.25 (1 + R1/R2).
(1)
Alternatively, the relationship between R1 and R2 is
given by:
R1 = R2 (VOUT /1.25 - 1).
(2)
For the reasons of reducing power dissipation and
loop stability, R2 is chosen to be 100KΩ. For G916,
R1 is 164K, and the pre-set VOUT is 3.30V.
When external voltage divider is used, as shown in
Figure 2, the SET pin voltage will be larger than
350mV. The non-inverting input of the amplifier will be
connected to the external voltage divider. However,
the operation of the feedback loop is the same, so that
the conditions of Equations 1 and 2 are still true. The
output voltage is still given by Equation 1.
For G916-XXX, adjust the internal reference and in-
ternal voltage divider. It provides a fixed mode output
ranging from 1.2V to 5V.
Ver: 1.7
Jan 25, 2006
TEL: 886-3-5788833
http://www.gmt.com.tw
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