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PDF ( 数据手册 , 数据表 ) UBA2074

零件编号 UBA2074
描述 High Voltage Full-bridge control IC
制造商 NXP Semiconductors
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UBA2074 数据手册, 描述, 功能
UBA2074(A)
High Voltage Full-bridge control IC for CCFL backlighting
Rev. 02.0 — February 2007
Preliminary data sheet
1. General description
The UBA2074 is a high voltage IC intended to drive Cold Cathode Fluorescent Lamps
(CCFLs) for back-lighting applications. The IC contains level-shifters, bootstrap diodes
and drivers for the external full-bridge power switches.
Furthermore, the UBA2074 has a build-in HF oscillator which determines the operating
frequency, a phase shift controller for obtaining constant lamp current, and a PWM
generator which is used to set the brightness level of the CCFLs.
Multiple inverters can be synchronized to a single operating frequency, while maintaining
constant lamp current. Also, PWM dimming can be synchronized by either using the
internal PWM generator, or by using an externally applied PWM signal.
The UBA2074 is designed to operate in a very wide inverter supply voltage range. The IC
can be configured to be supplied directly from a low voltage supply up to 30 V DC. The
fullbridge voltage can range up to 550V.
The A-version has no hardswitching protection in order to suit medium voltage (e.g 60V)
full bridge systems.
2. Features
Suitable for operating in a very wide inverter supply voltage range (up to 550 V DC for
SO28 package, up to 225 V for SSOP28 package)
Wide IC supply voltage range (9 V to 30 V DC)
Suitable for synchronizing multiple inverters to a single operating frequency with equal
lamp current phase
Adjustable maximum fault timing
Integrated level-shifters
Integrated bootstrap diodes
Lamp current control
Over-voltage control
Over-current protection
Ignition failure detection
Hard-switching control (not in the A-version)
Arcing detection
Brightness level adjustment through PWM dimming
Integrated PWM generator
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UBA2074 pdf, 数据表
NXP Semiconductors
UBA2074(A)
High Voltage Full-bridge control IC for CCFL backlighting
7.3 Start-up and Under-Voltage Lock-Out (UVLO)
The start and stop voltage levels on the VDC-pin depent on the way the IC is supplied:
In the low voltage configuration, the IC starts up at VVDC(start-low) and locks out (stops
oscillating) when the voltage on the VDC-pin drops below VDC(stop-low).
In the high voltage configuration, the IC starts up at VVDC(start-high) and locks out (stops
oscillating) when the voltage on the VDC-pin drops below VVDC(stop-high).
7.4 Enable
The UBA2074 is put in standby when the voltage on the EN-pin comes below VEN(low) (see
Table 5). The IC will stop oscillating, and most of the internal circuits will shut down.
However, in low voltage configuration, the internal linear regulator between VDC and VDD
will remain active, but with reduced current supply capability. All internal signals are reset
when the EN-pin is low.
When the voltage on the EN-pin comes above VEN(high) the IC will start up again.
7.5 Lamp (re-)ignition
The IC starts at its maximum switching frequency Fs(max). First the capacitors at the
CIFB-pin and CSWP-pin are charged (setting the phase shift between the two bridge
halves to maximum). Then the frequency is swept down to the minimum frequency Fs(min)
(see Figure 7). During this initial ignition frequency sweep the lamp voltage will increase
as the frequency comes closer to the resonant frequency of the unloaded resonance
circuit. Once the ignition voltage Vign is reached, the lamps will ignite and the lamp voltage
will drop to the voltage of the loaded resonance curve.
Fig 6. Initial ignition of flourescent lamp via frequency sweep and load resonance .
UBA2074(A)
Preliminary data sheet
Rev. 02.0 — February 2007
© NXP B.V. 2007. All rights reserved.
8 of 33
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UBA2074 equivalent, schematic
NXP Semiconductors
UBA2074(A)
High Voltage Full-bridge control IC for CCFL backlighting
7.10.1 Over voltage protection
The over voltage protection circuit is intended to prevent the transformer output voltage
from exceeding its maximum rating. It can also be used to regulate the output voltage to
the required lamp ignition voltage.
When the voltage on the VFB-pin exceeds the OV reference level VVFB(ovref), over voltage
is detected. As result PWM dimming and synchronisation are disabled and the fault timer
is started. Also the capacitor connected to the CVFB-pin is discharged (by ICVFB(ov)).
When the voltage at the VFB-pin drops below the OV reference level, the CVFB capacitor
is charged (by ICVFB(charge)) again.and the output voltage of the transformer will increase
again. Because the charging and discharging of the CVFB capacitor follows the ripple on
the VFB voltage, the feedback gain of the voltage control loop is set by the ripple on the
feedback signal.
If CVFB is more discharged then charged (over a hf cycle) then the CVFB voltage will
drop, and the switching frequency increase. As a result the output voltage of the
transformer will decrease2. When this happens the current control loop is froozen (switch
S1 of Figure 9 is opened (non-conducting), so the regulation level stored in C1 cannot be
changed by the current regulation loop) in order to prevent the frequency increase being
compensated by a phase shift difference increase by the current control.
An internal latch makes the OV fault signal continuesly high even if the voltage at the
VFB-pin only exceeds VVFB(ovref) during part of the output period. So the peak of the
voltage on the VFB-pin determines if an over voltage fault condition is seen.In order to
avoid that OV fault condition at the nominal switching frequency (with the lamps operating
normally), the voltage ripple on the VFB-pin must not be too large.
The voltage at CVFB is limited by the oscillator circuit to VCVFB(range) when the minimum
switching frequency Fs(min) is reached. This ensures an immediate frequency increase
capability at over voltage detection.
7.10.2
Over current detection
When the absolute value3 of the voltage across the current sense resistor (connected to
the IFB-pin) exceeds the OC reference level VIFB(ocref), over-current is detected. As result
PWM dimming and synchronisation are disabled and the fault timer is started.
7.10.3 Arcing detection
If arcing occurs, for instance due to a bad lamp connection, it causes repetitive short
current spikes that can be seen as voltage spikes at the IFB input4. The arcing detection
circuit is directly connected to the IFB-pin, so it can only see spikes with a positive polarity.
Usually that will be sufficient. It can detect spikes with amplitude above VIFB(arcref) and a
duration longer then TSPIKE(min). Each spike will trigger an internal one-shot, which signals
to the control circuits that arcing has been detected. If this happens PWM dimming and
synchronisation are disabled, and the fault timer is started.
7.10.4 Hard switching protection
The hard switching protection is not present in the A-version.
2. Presuming that the effective full bridge load impedance is in inductive region.
3. The OC comparator is behind the double side rectifier at the IFB-pin
4. Provided that the current sensing circuit is simple sense resistor only.
UBA2074(A)
Preliminary data sheet
Rev. 02.0 — February 2007
© NXP B.V. 2007. All rights reserved.
16 of 33
Free Datasheet http://www.datasheet4u.net/










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