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PDF ( 数据手册 , 数据表 ) UP6101

零件编号 UP6101
描述 5V/12V Synchronous-Rectified Buck Controller
制造商 uPI Semiconductor
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UP6101 数据手册, 描述, 功能
uP6101
5V/12V Synchronous-Rectified
Buck Controller
General Description
Features
The uP6101 is a compact synchronous-rectified buck
controller specifically designed to operate from 5V or 12
supply voltage and to deliver high quality output voltage as
low as 0.6V (uP6101A) or 0.8V (uP6101B/C). This (P)SOP-
8 device operates at fixed 300kHz (uP6101A/B) or 200kHz
(uP6101C) frequency and provides an optimal level of
integration to reduce size and cost of the power supply.
This controller integrates internal MOSFET drivers that
support 12V+12V bootstrapped voltage for high efficiency
power conversion. The bootstrap diode is built-in to simplify
the circuit design and minimize external part count.
Other features include internal softstart, under voltage
protection, over current protection and shutdown function.
With aforementioned functions, this part provides
customers a compact, high efficiency, well-protected and
cost-effective solutions. This part comes to SOP-8 and
PSOP-8 packages.
Applications
† Power Supplies for Microprocessors or
Subsystem Power Supplies
† Cable Modems, Set Top Boxes, and DSL
Modems
† Industrial Power Supplies; General Purpose
Supplies
† 5V or 12V Input DC-DC Regulators
† Low-Voltage Distributed Power Supplies
† Operates from 5V or 12V Supply Voltage
„ 3.3V to 12V VIN Input Range
„ 0.6V or 0.8V to 80% of VIN Output Range
„ 0.6V or 0.8V Internal Reference
„ 1.5% Over Line Voltage and Temperature
† Simple Single-Loop Control Design
„ Voltage-Mode PWM Control
„ Fast Transient Response
† High-Bandwidth Error Amplifier
„ 0% to 80% Duty Cycle
† Lossless, Programmable Overcurrent Protection
„ Uses Lower MOSFET RDS(ON)
† 300/200kHz Fixed Frequency Oscillator
† Internal SoftStart
† Integrated Boot Diode
Ordering Information
Order Number Package
Remark
uP6101AS8
SOP-8
0.6V reference voltage;
300kHz switching frequency
uP6101BS8 SOP-8
uP6101BS8-A SOP-8
uP6101BU8 PSOP-8
0.8V reference voltage;
300kHz switching frequency
uP6101CSA8 SOP-8
0.8V reference voltage;
200kHz switching frequency
Note: uPI products are compatible with the current IPC/
JEDEC J-STD-020 and RoHS requirements. They are 100%
matte tin (Sn) plating and suitable for use in SnPb or Pb-
free soldering processes.
Pin Configuration & Typical Application Circuit
BOOT
UGATE
GND
LGATE
BOOT
UGATE
GND
LGATE
18
27
36
45
SOP-8
18
27
3 GND 6
45
PSOP-8
PHASE
COMP/EN
FB
VCC
Disable
Enable
PHASE
COMP/EN
FB
VCC
1uF
VCC
5
7 1 BOOT
2 UGATE
8 PHASE
FB
6
4 LGATE
3
GND
VIN
VOUT
uPI Semiconductor Corp., http://www.upi-semi.com
Rev. F01, File Name: uP6101-DS-F0101
1
Free Datasheet http://www.datasheet4u.net/







UP6101 pdf, 数据表
uP6101
Electrical Characteristics
Parameter
Oscillator
Free Running Frequency
Ramp Amplitude
Error Amplifier
Open Loop DC Gain
Gain-Bandwidth Product
Slew Rate
Transconductance
Output Source Current
Output Sink Current
Input Offset Voltage
Input Bias Current
PWM Controller Gate Drivers
Upper Gate Source
Upper Gate Sink
Upper Gate Sink
Lower Gate Source
Lower Gate Sink
Lower Gate Sink
PHASE Falling to LGATE Rising
Delay
LGATE Falling to UGATE Rising
Delay
Minimum Duty Cycle
Maximum Duty Cycle
Reference Voltage
Nominal Feedback Voltage
Protection
Under Voltage Protection
Over Current Threshold
Soft-Start Interval
Enable Threshold
Symbol
Test Conditions
Min Typ Max Units
For uP6101A/B
fOSC For uP6101C
DVOSC VCC = 12V
AO
GBW
SR
Guaranteed by Design
Guaranteed by Design
Guaranteed by Design
VFB < VREF
VFB > VREF
270 300 330
kHz
180 200 220
-- 1.8 -- VP-P
55 70 -- dB
-- 10 -- MHz
3 6 -- V/us
-- 800 1100 uA/V
80 120 -- uA
80 120 -- uA
-2.0 0 2.0 mV
-- 0.1 1.0 nA
IUG_SRC
IUG_SNK
RUGATE
ILG_SRC
ILG_SNK
RLGATE
VBOOT - VPHASE = 12V, VBOOT - VUGATE = 6V
VBOOT - VPHASE = 12V, VBOOT - VUGATE = 6V
VUGATE - VPHASE = 1V
VCC - VLGATE = 6V
VLGATE = 6V
VLGATE = 1V
VPHASE < 1.2V to VLGATE > 1.2V
--
--
--
--
--
--
--
VLGATE < 1.2V to (VUGATE - VPHASE ) > 1.2V
--
--
70
-1 --
1.5 --
24
-1 --
1.5 --
24
30 --
30 --
0 --
75 80
A
A
W
A
A
W
ns
ns
%
%
VFB
VCC = 12V, VCOMP = 1.6V, uP6101A
VCC = 12V, VCOMP = 1.6V, uP6101B/C
0.591 0.6 0.609
0.788 0.8 0.812
V
V
VFB_UVP
VPHASE
RLGATE = open
uP6101A
TSS uP6101B
uP6101C
VCOMP/EN
0.3 0.4 0.5 V
-- -375 -- mV
-- 2.7 --
-- 3.4 -- ms
-- 5.4 --
0.3 0.4 0.5 V
uPI Semiconductor Corp., http://www.upi-semi.com
Rev. F01, File Name: uP6101-DS-F0101
8
Free Datasheet http://www.datasheet4u.net/







UP6101 equivalent, schematic
uP6101
Application Information
Figure 7 illustrates a type II compensation network using
OTA. The compensation network consists of the error
amplifier and the impedance networks ZFB and ZCOMP.
VOUT
R3
ZFB R2
GM
Error
Amplifier
VREF
VCOMP
C2 R1
ZCOMP C1
3. Place Pole (C2) at half the switching frequency.
4. Check gain against error amplifier open loop gain.
5. Estimate phase margin - repeat if necessary.
60
40 Loop Gain
20
Modulator
Gain
0
Compensator
Gain
Figure 7. Type II Compensation Network Using OTA.
The compensator transfer function is the small-signal
transfer function of VCOMP/VOUT. This function is dominated
by a Mid-Band Gain and compensation network ZCOMP, with
a pole at FP1 and a zero at FZ1. The Mid-Band Gain of the
compensation is expressed as:
Mid
_
Band
_
Gain
=
R2
R2 × R3
× R1×
GM
The equations below relate the compensation network’s
pole and zero to the components (R1, C1, and C2) in Figure
8.
FP1
=
1
2π
×
R1×
(
C1×
C1+
C2
C2
)
;
FZ1
=
1
2π ×R1× C1
60
40
Loop Gain
20
Modulator
Gain
FZ1
0R1
C1
-20
Compensator
Gain
FP1
-40
-60
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
Frequency (Hz)
Figure 8. Frequency Response of Type II Compensation.
Figure 9 shows the DC-DC converter’s gain vs. frequency.
Careful design of ZCOMP and ZFB provides tight regulation
and fast response to load/line transient with good stability.
Follow the guidelines for locating the poles and zeros of
the compensation network.
1. Pick Mid-Band Gain (R1) for desired converter bandwidth.
2. Place Zero (C1) below LC double pole (~25% FLC).
-20
-40
-60
1.E+02
1.E+03
1.E+04
1.E+05
Frequency (Hz)
1.E+06
Figure 9. Frequency Response of Type II Compensation.
Design Example
As a design example, take a power supply with the following
specifications:
VIN = 10.8V to 13.2V (12V nominal), VOUT = 1.2V Ó¡5%,
IOUT(MAX) = 20A, fOSC = 300kHz(uP6101A/B)/
200kHz(uP6101C), VOUT = 20mV, bandwidth = 50kHz.
1.) Power Component Selection
First, choose the inductor for about 20% ripple current at
the maximum VIN:
IL
=
fOSC
1
× LOUT
× VOUT
× (1
VOUT
VIN
)
IL
=
20A × 20%
=
1
300kHz × LOUT
×1.2V × (1
1.2V
13.2V
)
L OUT = 0.9 uH
Selecting a standard value of 1.0uH results in a maximum
ripple current of 3.6A.
Choose two 1000uF capacitors with 10mESR in parallel
to yield equivalent ESR = 5m. The output ripple voltage
is about 18mV accordingly. An optional 22uF ceramic output
capacitor is recommended to minimize the effect of ESL in
the output ripple.
The modulatorDC gain and break frequencies are calculated
as:
DC
Gain
=
20
×
log(
VIN
VOSC
)
=
20
×
log(11.28
)
=
16.5dB
FLC =
2π
1
1× 10 6 × 2000 × 10 6
= 3.56kHz
uPI Semiconductor Corp., http://www.upi-semi.com
Rev. F01, File Name: uP6101-DS-F0101
16
Free Datasheet http://www.datasheet4u.net/










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