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PDF ( 数据手册 , 数据表 ) KT0830EG

零件编号 KT0830EG
描述 Stereo FM Receiver
制造商 KTMicro
LOGO KTMicro LOGO 


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KT0830EG 数据手册, 描述, 功能
Stereo FM Receiver
Radio-on-a-Chip™
KT0830EG
ƒ Features
Fully compatible with KT0830E
Excellent radio reception with short antenna
32.768KHz and 38KHz crystal support
Variable reference clock support including
32.768 KHz/7.6MHz/12MHz/24MHz
Excellent tuning experience with built in SNR
meter and RSSI
Low-cost true single-chip FM radio solution
Single-Chip Low IF FM Receiver
Direct band, volume, frequency selection
Digital FM Demodulator
Digital Stereo Processor
Low-noise PLL with integrated VCO
Extended FM band support (64-109MHz)
Integrated Class AB headphone driver
High Fidelity
SNR: 64dB
THD: <0.3%
High Sensitivity: -106dBm
Low supply current
19mA (operating), 1uA (power-down)
High Driving capability
Drive up to 16 ohm load (single-sided)
Automatic Frequency Control (AFC)
Automatic gain control (AGC)
Anti-pop circuit
16-pin SOP package
ƒ Applications
Single chip FM radio used in PMP, boom box,
sporting devices, medical devices and etc
Figure 1: System Diagram
ƒ Description
The KT0830EG is a high-quality Monolithic Digital FM
Receiver designed to playback high-fidelity FM broadcasting
signals under various conditions.
The KT0830EG offers a true single-chip FM radio solution.
There are no external filters or frequency-tuning devices
thanks to a proprietary digital low-IF architecture, a fully-
integrated LNA, automatic gain control (AGC), high-
performance ADCs, high-quality analog and digital filters, and
an on-chip low-noise self-tuning VCO. The on-chip high-
fidelity Class-AB driver further eliminates the need for any
external audio amplifiers and can drive stereo headphones
directly.
The on-chip LDO regulator allows the chip to operate with
power supply ranging from 2.0V to 3.6V consuming merely
19mA in full operation mode and less than 10uA when standby
– greatly extending the battery life.
The small footprint, high integration level and great flexibility
make KT0830EG for any standalone FM radio applications.
Rev. 1.2
Information furnished by KT Micro is believed to be accurate and reliable.
However, no responsibility is assumed by KT Micro for its use, nor for any
infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any
patent or patent rights of KT Micro, Inc.
Copyright ©2010, KT Micro, Inc.
深圳代理办事处:深圳市高智创电子有限公司 网址:www.sbdsemi.cn
联系:086-0755-81753689/83340989 移动:13642365547 杨斌(先生)
本信息资料皆为原设计公司所拥有及发布,如有详细疑问,请联系本公司及原厂。
1
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KT0830EG pdf, 数据表
KT0830EG
seek is completed. During the seeking, the current channel can be read out from
READCH<9:0> bits. Refer to application notes for more information.
3.6 Power on Sequence
KT0830EG is powered up by pulling the POWER_ON pin to high. or leaving this
pin not connection. No external power-on reset circuit is required. One needs to wait
for 400ms before he/she can configure the chip through the serial interface.
3.7 Reference Clock
The KT0810G support variable reference clock frequencies, such as 32.768KHz,
7.6MHz, 12MHz, 13MHz, 24MHz, 26MHz and etc. The built-in crystal oscillator
also supports 32.768KHz and 38KHz crystal. Please refer to application notes for
more information about setting different reference clock.
4 Control Interface- I2C
I2C bus mode uses SCLK and SDIO to transfer data. The device always drives data to
SDIO at the falling edge of SCLK and captures data from SDIO at the rising edge of
SCLK. The device acknowledges the external controller by driving SDIO low at the
falling edge of SCLK. Data transfer always begins with START condition and ends with
STOP condition. The external controller can read/write one 16-bits data at the specified
address or read/write desired number of registers data continuously from the specified
address till when STOP condition is occurred.
For write operations, external controller should send command & data in the following
sequence: START condition -> 7 bit chip address and Write command (“0”) -> 8 bit
register address n -> write data n [15:8] -> write data n [7:0] -> write data n+1 [15:8] ->
write data n+1 [7:0] -> …… -> STOP condition.
For read operations, external controller should send command & data in the following
sequence: START condition -> 7 bit chip address and Write command (“0”) -> 8 bit
register address n -> 7 bit chip address and Read command (“1”) , then device will send
read data n [15:8] -> read data n [7:0] -> read data n+1 [15:8] -> read data n+1 [7:0] -
> …… till STOP condition.
Table 6 : I2C Interface Protocol
RANDOM REGISTER WRITE PROCEDURE
S 0 1 1 x 1 1 1 WA A A A P
7 bit chip
Register address write data [15:8] write data [7:0]
address
Acknowledge
Acknowledg
Acknowledge
e
START
WRITE command
STOP condition
condition
Copyright ©2010, KT Micro, Inc.
深圳代理办事处:深圳市高智创电子有限公司 网址:www.sbdsemi.cn
联系:086-0755-81753689/83340989 移动:13642365547 杨斌(先生)
本信息资料皆为原设计公司所拥有及发布,如有详细疑问,请联系本公司及原厂。
8
Free Datasheet http://www.datasheet4u.com/







KT0830EG equivalent, schematic
KT0830EG
current channel during seek or after a
seek or tune operation is completed
5.11 . Status Register C (Reg 0x14)
Bit Symbol
Access Default
15:6 Reserved
R 0000000000
5:0 AFC_DELTAF_5767<5:0> R
000000
Functional Description
Reserved
Frequency difference between
CHAN and received signal,
calculated by AFC block in
two’s complement format.
Range is -31 to +31. Unit is
KHz. This register is valid when
STC=1
5.12 Status Register D (Reg 0x15)
Bit Symbol
Access Default
15:8 Reserved
R 00000000
7:0 AFC_DELTAF<7:0> R
00000000
Functional Description
Reserved
Frequency difference between CHAN
and received signal, calculated by AFC
block in two’s complement format.
Range is -127 to +127. Unit is KHz.
This register is valid when STC=1
5.13 Antenna Register (Reg 0x1D)
Bit Symbol
15:0 Reserved
Access Default Functional Description
5.14 SNR Register (Reg 0x1F)
Bit Symbol
15:8 SNRTH<7:0>
Access Default
RW 0x00
7:0 SNR<7:0>
R 0x00
Functional Description
SNR threshold for traditional seek
mode
SNR value of current channel
0x00 = Worst
……
0xFF = Best
5.15 SEEKTH Register (Reg 0x20)
Bit Symbol
Access Default
15:8 ADV_SEEKTH_HIGH RW 0x14
7:0 ADV_SEEKTH_LOW RW 0x19
Functional Description
High threshold for advanced seek
mode
Low threshold for advanced seek mode
5.16 Softmute Register (Reg 0x21)
Bit Symbol
Access Default
Functional Description
Copyright ©2010, KT Micro, Inc.
深圳代理办事处:深圳市高智创电子有限公司 网址:www.sbdsemi.cn
联系:086-0755-81753689/83340989 移动:13642365547 杨斌(先生)
本信息资料皆为原设计公司所拥有及发布,如有详细疑问,请联系本公司及原厂。
16
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