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PDF ( 数据手册 , 数据表 ) D78C14L

零件编号 D78C14L
描述 UPD78C14
制造商 NEC
LOGO NEC LOGO 


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D78C14L 数据手册, 描述, 功能
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD78C14(A)
8-BIT SINGLE-CHIP MICROCONTROLLER (WITH A/D CONVERTER)
The µPD78C14(A) is a single-chip, CMOS 8-bit microcontroller in which a 16-bit ALU, a ROM, a RAM, an A/D converter,
a multifunction timer/event counter, and a serial interface are all integrated. Moreover, a 48-Kbyte external expansion
memory (ROM/RAM) can be connected.
Since the µPD78C14(A) uses the CMOS construction, its operations are performed with low power consumption. By
using the standby function, functions such as data retention are performed with lower power consumption.
For details on functions, refer to the User’s Manual listed below. Please read it before starting design work.
87AD series µPD78C18 User’s Manual: IEU-1314
FEATURES
High reliability as compared with µPD78C14
159 instructions: 87AD instruction set
Multiply and divide instructions, 16-bit arithmetic operation instructions
Instruction cycle: 0.8 µs at 15 MHz
Internal ROM: 16384 W x 8
Internal RAM: 256 W x 8
Direct addressing to an external memory (ROM/RAM) up to 64 Kbytes
Highly accurate 8-bit A/D converter: Eight analog inputs
General-purpose serial interface: Asynchronous, synchronous, and I/O interface modes
Multifunction 16-bit timer/event counter
Two 8-bit timers
I/O lines: 44
Interrupt functions: Three external, eight internal
• Non-maskable interrupt: 1
• Maskable interrupts: 10
Zero-cross detection function (two inputs)
Standby functions: HALT mode, Hardware/software STOP mode
ORDERING INFORMATION
Part number
µPD78C14G(A)-xxx-36
µPD78C14GF(A)-xxx-3BE
µPD78C14L(A)-xxx
Package
64-pin plastic QUIP
64-pin plastic QFP (14 x 20 mm)
68-pin plastic QFJ (950 x 950 mil)
Quality grade
Special
Special
Special
Remark xxx is a ROM code suffix.
Please refer to “Quality grade on NEC Semiconductor Devices” (Document number IEI-1209) published by
NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
Document No. IC-2813B
(O.D. No. IC-8242B)
Date Published May 1995 P
Printed in Japan
The information in this document is subject to change without notice.
*H The mark shows revised points.
©©
11999914
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D78C14L pdf, 数据表
µPD78C14(A)
(Continued)
Pin
RD
(Read
Strobe)
ALE
(Address
Latch
Enable)
MODE0
MODE1
(Mode)
NMI
(Non-
Maskable
Interrupt)
INT1
(Interrupt
Request)
AN7-AN0
(Analog
Input)
VAREF
(Reference
Voltage)
AVDD
(Analog
VDD)
AVSS
(Analog
VSS)
X1, X2
(Crystal)
RESET
(Reset)
STOP
(Stop)
VDD
VSS
Input/Output
Output
Output
Input/Output
Input
Function
This is a strobe signal output to read data from external memory. This signal
becomes high level except during the data read machine cycle for external memory.
This signal becomes output high impedance when the RESET signal is low or in
the hardware STOP mode.
This is a strobe signal to externally latch the low-order address information
output to pins PD7-PD0 to access the external memory. This signal becomes
output high impedance when the RESET signal is low or in the hardware STOP
mode.
Set the MODE0 pin to 0 (low level) and MODE1 pin to 1 (high level)Note.
When both pins MODE0 and MODE1 are set to 1Note, these pins synchronize to
the ALE and a control signal is output.
This pin inputs the edge triggering (falling edge) nonmaskable interrupt.
Input
Input
Input
Input
Input
This pin inputs edge triggering (rising edge) maskable interrupt. This pin is also
shared with zero-cross detection pin for AC input.
These eight pins input analog signals for the A/D converter. Pins AN7-AN4 can
be used as edge detection (falling edge) input.
This pin inputs the reference voltage for the A/D converter and controls the
operation for the A/D converter.
Power supply pin for the A/D converter
Ground pin for the A/D converter
These are crystal connecting pins for the system clock oscillation. When a clock
is externally supplied, input it through pin X1. Input the clock to X1 and its reverse
phase to X2.
This pin inputs the active-low reset input signal.
This pin inputs control signal of the hardware STOP mode. When the low level
of this signal is input, the oscillator stops to operate.
Positive power supply pin
Ground pin
Note
Pull-up with the following external resistor:
4 (k) R 0.4 tCYC (k)
tCYC (unit: ns)
Example 4 (k) R 26 (k): tCYC = 66 (ns) at 15 MHz
4 (k) R 33 (k): tCYC = 83 (ns) at 12 MHz
8
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D78C14L equivalent, schematic
µPD78C14(A)
3.2 Instruction Code Description
r r1 rpa
R2 R1 R0 reg
00 0 V
00 1
01 0
A
B
r2
01 1 C r
10 0 D
10 1 E
11 0 H
11 1 L
T2 T1 T0 reg
0 0 0 EAH
0 0 1 EAL
010 B
011 C
100 D
101 E
110 H
111 L
sr
S5 S4 S3 S2 S1 S0 Special-reg
00 0 0 0 0
00 0 0 0 1
00 0 0 1 0
00 0 0 1 1
00 0 1 0 1
00 0 1 1 0
00 0 1 1 1
00 1 0 0 0
00 1 0 0 1
00 1 0 1 0
00 1 0 1 1
00 1 1 0 0
00 1 1 0 1
01 0 0 0 0
01 0 0 0 1
01 0 0 1 0
01 0 0 1 1
01 0 1 0 0
01 0 1 1 1
01 1 0 0 0
01 1 0 0 1
01 1 0 1 0
01 1 0 1 1
10 0 0 0 0
10 0 0 0 1
10 0 0 1 0
10 0 0 1 1
10 1 0 0 0
PA
PB
PC
PD
PF
sr1 sr2
MKH
MKL
ANM
SMH
SML
sr
EOM
ETMM
TMM
MM
MCC
MA
MB
MC
MF
TXB
RXB
TM0
TM1
CR0
CR1
CR2
CR3
ZCM
sr3
U0
0
1
Special-reg
ETM0
ETM1
sr4
V0
0
1
Special-reg
ECNT
ECPT
A3 A2 A1 A0 addressing
0 000
0 001
0 010
(BC)
(DE)
rpa1
0 011
0 100
0 101
0 110
0 111
(HL)
(DE)+
(HL)+
(DE)
(HL)
rpa
rpa2
1 0 1 1 (DE+byte)
1 1 0 0 (HL+A)
1 1 0 1 (HL+B)
1 1 1 0 (HL+EA)
1 1 1 1 (HL+byte)
rpa3
C3 C2 C1 C0
0 010
0 011
0 100
0 101
1 011
1 100
1 101
1 110
1 111
addressing
(DE)
(HL)
(DE)++
(HL)++
(DE+byte)
(HL+A)
(HL+B)
(HL+EA)
(HL+byte)
irf
I4 I3 I2 I1 I0
00 0 0 0
00 0 0 1
00 0 1 0
00 0 1 1
00 1 0 0
00 1 0 1
00 1 1 0
00 1 1 1
01 0 0 0
01 0 0 1
01 0 1 0
01 0 1 1
01 1 0 0
10 0 0 0
10 0 0 1
10 0 1 0
10 0 1 1
10 1 0 0
INTF
NMI
FT0
FT1
F1
F2
FE0
FE1
FEIN
FAD
FSR
FST
ER
OV
AN4
AN5
AN6
AN7
SB
rp
P2 P1
00
00
01
01
10
P0
0
1
0
1
0
reg-pair
SP
BC
DE
HL
EA
rp
rp2
rp3
rp1
Q2 Q1 Q0 reg-pair
00
00
01
01
10
0
1
0
1
0
VA
BC
DE
HL
EA
f
F2 F1 F0 flag
00
01
01
10
0
0
1
0
CY
HC
Z
16
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