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PDF ( 数据手册 , 数据表 ) WG12232A-NGA-N

零件编号 WG12232A-NGA-N
描述 LCD Module
制造商 ETC
LOGO ETC LOGO 


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WG12232A-NGA-N 数据手册, 描述, 功能
SPECIFICATION
CUSTOMER :
MODULE NO.:
WG12232A-NGA-N
APPROVED BY:
( FOR CUSTOMER USE ONLY )
SALES BY
APPROVED BY
CHECKED BY
PREPARED BY
ISSUED DATE:
Contents
1.Module Classification Information
2.Precautions in use of LCD Modules
3.General Specification
4.Absolute Maximum Ratings
5.Electrical Characteristics
6.Optical Characteristics
7.Interface Description
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WG12232A-NGA-N pdf, 数据表
This 122×32 dots LCD Module built in two SED 1520 LSI controller.
MPU interface
D0 ~ D7
A 0 , C S 1 , C S2
R /W
RES
D is pla y s ta rt line
re gis te r
L ine c ounte r
M PU
inte rfa c e
C olume
addr es s
re gis te r
C olume
addr es s
counte r
D is pla y D a ta R A M
( DD RAM )
D is pla y da ta la tc h
L C D drive c irc uit
T o L C D Pa ne l
The SED 1520 controller transfers data via 8-bit bidirecional data buses (Do to D7), it can fit
any MPU if it corresponds to SED 1520 Read and Write Timing Characteristics.
Data transfer
The SED1520 driver uses the A0, E and R/W signals to transfer data between the system MPU
and internal registers, The combinations used are given in the table below.
A0 R/W Function
1 1 Read display data
1 0 Write display data
0 1 Read status
0 0 Write to internal register (command)
Busy flag
When the Busy flag is logical 1, the SED1520 series is executing its internal operations. Any
command other than Status Read is rejected during this time. The Busy flag is output at pin D7
by the Status Read command. If an appropriate cycle time (tCYC) is given, this flag needs not
be checked at the beginning of each command and, therefore, the MPU processing capacity
can greatly be enhanced.
Display Start Line and Line Count Registers
The contents of this register form a pointer to a line of data in display data RAM
corresponding to the first line of the display (COM0), and are set by the Display Start Line
command.
Column Address Counter
The column address counter is a 7-bit presentable counter that supplies the column address for
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WG12232A-NGA-N equivalent, schematic
No. Defect
1 Spots
2 Bubbles in Polarize
3 Scratch
4 Allowable Density
5 Coloration
Judgment Criterion
A)Clear
Size: d mm
Acceptable Qty in active area
d 0.1
Disregard
0.1<d0.2
6
0.2<d0.3
2
0.3<d
0
Note: Including pin holes and defective dots which must be
within one pixel size.
B)Unclear
Size: d mm
Acceptable Qty in active area
d 0.2
Disregard
0.2<d0.5
6
0.5<d0.7
2
0.7<d
0
Size: d mm
Acceptable Qty in active area
d0.3
Disregard
0.3<d1.0
3
1.0<d1.5
1
1.5<d
0
In accordance with spots cosmetic criteria. When the light
reflects on the panel surface, the scratches are not to be
remarkable.
Above defects should be separated more than 30mm each other.
Not to be noticeable coloration in the viewing area of the LCD
panels.
Back-light type should be judged with back-light on state only.
Partition
Minor
Minor
Minor
Minor
Minor
Displaystartline
register
Linecounter
D0~D7
A0,CS1,CS2
R/W
RES
MPU Colume Colume DisplayDataRAM Displaydatalatch
interface address address (DDRAM)
register counter
LCDdrivecircuit
ToLCDPanel
End
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