DataSheet8.cn


PDF ( 数据手册 , 数据表 ) GM5822H

零件编号 GM5822H
描述 (GM5822H / GM5862H) highly integrated mixed signal LCD controller
制造商 Genesis
LOGO Genesis LOGO 


1 Page

No Preview Available !

GM5822H 数据手册, 描述, 功能
gm5862H/gm5822H
PRELIMINARY Datasheet
Ordering Information
Part Number
gm5862H-LF(1)
gm5822H-LF
Output
Resolution
WUXGA
(1920x1200)
WSXGA+
(1680x1050)
Package
256-pin PQFP
Lead Free
Note (1): HDCP enabled parts are only sold to HDCP licensed customers.
Temperature Range
0-70°C
GENESIS MICROCHIP CONFIDENTIAL
P/N C5862-DAT-01C
www.gnss.com
Copyright ©2006 Genesis Microchip Inc. All rights reserved. Including the right of reproduction in whole or in part in any form.
Even though Genesis Microchip Inc. has reviewed this publication, GENESIS MICROCHIP INC. MAKES NO WARRANTY OR REPRESENTATION, EITHER EXPRESS
OR IMPLIED, WITH RESPECT TO THIS PUBLICATION, ITS QUALITY, ACCURACY, NONINFRINGMENT, MERCHANTABILITY, OR FITNESS FOR A
PARTICULAR PURPOSE. AS A RESULT, THIS PUBLICATION IS PROVIDED “AS IS” AND THE READER ASSUMES THE RISK AS TO ITS QUALITY,
ACCURACY, OR SUITABILITY FOR ANY PARTICULAR PURPOSE.
IN NO EVENT WILL GENESIS MICROCHIP INC. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES RESULTING
FROM ANY DEFECT OR INACCURACY IN THIS PUBLICATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
This publication is provided with RESTRICTED RIGHTS. Use, duplication, or disclosure by the government are subject to restrictions set forth in DFARS 252.277-7013 or 48
CFR 52.227-19 as applicable.
The Genesis logo is a trademark of Genesis Microchip Inc. All other marks, brands and product names are the property of their respective owners.
Free Datasheet http://www.datasheet4u.com/







GM5822H pdf, 数据表
GENESIS MICROCHIP
gm5862H/gm5822H PRELIMINARY Datasheet
3 Pin List
I/O Legend: A = Analog, I = Input, O = Output, P = Power, G= Ground
Note: All ground pins to be connected to a single contiguous ground plane (system
ground).
Table 1: LVDS Panel Interface
Pin Name
No I/O Description
AVDD_LV_3.3
81 AP 3.3V supply for LVDS PLL and Bandgap. Bypass to system ground with a 0.1uF capacitor.
AVSS_LV
82 AG Ground for LVDS PLL and Bandgap. Tie directly to system ground.
AVDD_OUT_LV_3.3 83
AP 3.3V supply for LVDS/TTL outputs. Bypass to system ground with a 0.1uF capacitor.
CH3P_LV_E/R0
84 AO LVDS data, shared with LVTTL Display Port R0
CH3N_LV_E/R1
85 AO LVDS data, shared with LVTTL Display Port R1
CLKP_LV_E/R2
86 AO LVDS Clock+, Shared with LVTTL Display Port R2
CLKN_LV_E/R3
87 AO LVDS Clock-, Shared with LVTTL Display Port R3
CH2P_LV_E/R4
88 AO LVDS data, shared with LVTTL Display Port R4
CH2N_LV_E/R5
89 AO LVDS data, shared with LVTTL Display Port R5
CH1P_LV_E/R6
90 AO LVDS data, shared with LVTTL Display Port R6
CH1N_LV_E/R7
91 AO LVDS data, shared with LVTTL Display Port R7
CH0P_LV_E/G0
92 AO LVDS data, shared with LVTTL Display Port G0
CH0N_LV_E/G1
93 AO LVDS data, shared with LVTTL Display Port G1
AVSS_OUT_LV
94 AG Ground for LVDS/TTL outputs. Tie directly to system ground.
AVDD_OUT_LV_3.3 95
AP 3.3V supply for LVDS/TTL outputs. Bypass to system ground with a 0.1uF capacitor.
CH3P_LV_O/G2
96 AO LVDS data, shared with LVTTL Display Port G2
CH3N_LV_O/G3
97 AO LVDS data, shared with LVTTL Display Port G3
CLKP_LV_O/G4
98 AO LVDS Clock+, Shared with LVTTL Display Port G4
CLKN_LV_O/G5
99 AO LVDS Clock-, Shared with LVTTL Display Port G5
CH2P_LV_O/G6
100 AO LVDS data, shared with LVTTL Display Port G6
CH2N_LV_O/G7
101 AO LVDS data, shared with LVTTL Display Port G7
CH1P_LV_O/B0
102 AO LVDS data, shared with LVTTL Display Port B0
CH1N_LV_O/B1
103 AO LVDS data, shared with LVTTL Display Port B1
CH0P_LV_O/B2
104 AO LVDS data, shared with LVTTL Display Port B2
CH0N_LV_O/B3
105 AO LVDS data, shared with LVTTL Display Port B3
AVSS_OUT_LV
106 AG Ground for LVDS/TTL outputs. Tie directly to system ground.
AVDD_OUT_LV_3.3 107 AP
3.3V supply for LVDS/TTL outputs. Bypass to system ground with a 0.1uF capacitor.
Table 2: 656 Video Port
Pad Name
GPIO_24/VDA[0]
Pin I/O
215 IO
GPIO_25/VDA[1]
216 IO
GPIO_26/VDA[2]
217 IO
GPIO_27/VDA[3]
218 IO
GPIO_28/VDA[4]
219 IO
GPIO_29/VDA[5]
220 IO
GPIO_30/VDA[6]
221 IO
Description
GPIO_24/656 Video Data[0]
[5V-tolerant, internal pull-down]
GPIO_25/656 Video Data[1]
[5V-tolerant, internal pull-down]
GPIO_26/656 Video Data[2]
[5V-tolerant, internal pull-down]
GPIO_27/656 Video Data[3]
[5V-tolerant, internal pull-down]
GPIO_28/656 Video Data[4]
[5V-tolerant, internal pull-down]
GPIO_29/656 Video Data[5]
[5V-tolerant, internal pull-down]
GPIO_30/656 Video Data[6]
C5862-DAT-01C
Genesis Microchip CONFIDENTIAL
8
Free Datasheet http://www.datasheet4u.com/







GM5822H equivalent, schematic
GENESIS MICROCHIP
4 Functional Description
Figure 3: Functional Block Diagram
gm5862H/gm5822H PRELIMINARY Datasheet
4.1 Bootstrap Configuration
During hardware reset pins BOOT[7..0] are configured as inputs.  On the rising edge 
of RESETn, the value on these pins are latched and stored.  The latched values 
configure the hardware to certain configuration without any software interaction. 
These values are software readable by the onchip microcontroller.  Install a 10K pull
up resistor to indicate a ‘1’, otherwise install a 10K pulldown resistor to indicate a ‘0’.  
This ensures correct operation under all conditions, even though these bootstrap pins 
have internal 60K pulldowns. 
C5862-DAT-01C
Genesis Microchip CONFIDENTIAL
16
Free Datasheet http://www.datasheet4u.com/










页数 58 页
下载[ GM5822H.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
GM5822H(GM5822H / GM5862H) highly integrated mixed signal LCD controllerGenesis
Genesis

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap