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PDF ( 数据手册 , 数据表 ) K8P2716UZC

零件编号 K8P2716UZC
描述 128Mb C-die Page NOR Flash
制造商 Samsung semiconductor
LOGO Samsung semiconductor LOGO 


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K8P2716UZC 数据手册, 描述, 功能
Rev. 1.0, Jan. 2010
K8P2716UZC
128Mb C-die Page NOR Flash
56Pin TSOP(20x14mm), 64ball FBGA (11x13, 1.0mm ball pitch)
Page Mode, (8M x16, 16Mb x8)
datasheet
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SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
SPECIFICATIONS WITHOUT NOTICE.
Products and specifications discussed herein are for reference purposes only. All information discussed
herein is provided on an "AS IS" basis, without warranties of any kind.
This document and all information discussed herein remain the sole and exclusive property of Samsung
Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property
right is granted by one party to the other party under this document, by implication, estoppel or other-
wise.
Samsung products are not intended for use in life support, critical care, medical, safety equipment, or
similar applications where product failure could result in loss of life or personal or physical harm, or any
military or defense application, or any governmental procurement to which special terms or provisions
may apply.
For updates or additional information about Samsung products, contact your nearest Samsung office.
All brand names, trademarks and registered trademarks belong to their respective owners.
2009 Samsung Electronics Co., Ltd. All rights reserved.
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datasheet pdf - http://www.DataSheet4U.net/







K8P2716UZC pdf, 数据表
K8P2716UZC
datasheet
Rev. 1.0
NOR FLASH MEMORY
6.0 FUNCTIONAL BLOCK DIAGRAM
Address
Vcc
Vss
CE
OE
WE
RESET
RY/BY
BYTE
WP/ACC
A0(A-1)~A22
DQ0~DQ15
I/O
Interface
X
Dec
Cell Array
Block
Inform
Y Dec
Erase
Control
Program
Control
Latch &
Control
High
Voltage
Gen.
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datasheet pdf - http://www.DataSheet4U.net/







K8P2716UZC equivalent, schematic
K8P2716UZC
datasheet
Rev. 1.0
NOR FLASH MEMORY
10.0 DEVICE OPERATION
10.1 Read Mode
The K8P2716UZB is controlled by Chip Enable (CE), Output Enable (OE) and Write Enable (WE). When CE and OE are low and WE is high, the data
stored at the specified address location,will be the output of the device. The outputs are in high impedance state whenever CE or OE is high.
The K8P2716UZB is available for 8-Word Page mode. Page mode provides fast access time for high performance system.
After address access time(tAA), eight data words are loaded into an internal page buffer. A0 (A-1 in byte mode)~A2 bits determine which page word is
output during a read operation. A3~A22 bits must be stable throughout the page read access. Figure 13 shows the asynchronous page read more timing.
10.2 Standby Mode
The K8P2716UZB features Stand-by Mode to reduce power consumption. This mode puts the device on hold when the device is deselected by making
CE high (CE = VIH). Refer to the DC characteristics for more details on stand-by modes.
10.3 Output Disable
The device outputs are disabled when OE is High (OE = VIH). The output pins are in high impedance state.
10.4 Automatic Sleep Mode
The K8P2716UZB features Automatic Sleep Mode to minimize the device power consumption. When addresses remain steady for tAA+30ns, the device
automatically activates the Automatic Sleep Mode. In the sleep mode, output data is latched and always available to the system. When addresses are
changed, the device provides new data without wait time.
Address
tAA + 30ns
Outputs
Data
Data
10.5 Autoselect Mode
Data
Data
Auto Sleep Mode
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Figure 1: Auto Sleep Mode Operation
Data
Data
The K8P2716UZB offers the Autoselect Mode to identify manufacturer, device type and block protection verification by reading a binary code. The
Autoselect Mode allows programming equipment to automatically match the device to be programmed with its corresponding programming algorithm.
The manufacturer, device code ,block protection verification and indicator bit can be read via the command register. The Command Sequence is shown in
Table 6 and Figure 2. In addition, below Table 7 shows indicator bit in detail. The autoselect operation of block protection verification is initiated by first
writing two unlock cycle. To terminate the autoselect operation, write Reset command (F0H) into the command register.
Note : To access the Autoselect codes, the host system must issue the Autoselect command. The Autoselect command sequence can be written to an
address within a device that is either in the read or erase-suspend-read mode. The Autoselect command cannot be written while the device is actively
programming or erasing. Autoselect does not support page modes. The system must write the reset command to return to the read mode (or erase-sus-
pend read mode if the device was previously in Erase Suspend).
[Table 7] Indicator Bit Codes.
Description
DQ15 to
DQ8
Indicator Bit
L
DQ7
1=Factory-Locked
0=Not Locked
DQ6
to
DQ5
L
DQ4
0 = WP Protects Block 255
1 = WP Protects Block 0
DQ3 DQ2 DQ1 DQ0
HL LH
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