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PDF ( 数据手册 , 数据表 ) LE24LA162CB

零件编号 LE24LA162CB
描述 Two Wire Serial Interface EEPROM
制造商 Sanyo Semicon Device
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LE24LA162CB 数据手册, 描述, 功能
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Ordering number : ENA1695
LE24LA162CB
CMOS IC
Two Wire Serial Interface
EEPROM (16k EEPROM)
Overview
The LE24LA162CB is a 2-wire serial interface EEPROM. It realizes high speed and a high level reliability by
incorporating SANYO’s high performance CMOS EEPROM technology. This device is compatible with I2C memory
protocol, therefore it is best suited for application that requires small-scale re-writable nonvolatile parameter memory.
Functions
Capacity: 16k bits (2k × 8 bits)
Single supply voltage: 1.7V to 3.6V
Interface: Two wire serial interface (I2C Bus*)
Operating clock frequency: 400kHz
Low power consumption
: Standby: 2μA (max)
: Active (Read): 0.5mA (max)
Automatic page write mode: 16 Bytes
Read mode: Sequential read and random read
Erase/Write cycles: 105 cycles
Data Retention: 20 years
High reliability: Adopts SANYO’s proprietary symmetric memory array configuration (USP6947325)
Noise filters connected to SCL and SDA pins
Incorporates a feature to prohibit write operations under low voltage conditions.
Package : LE24LA162CB : WLP6J(1.06 х 1.50)
* I2C Bus is a trademark of Philips Corporation.
* This product is licensed from Silicon Storage Technology, Inc. (USA), and manufactured and sold by
SANYO Semiconductor Co., Ltd.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer's products or
equipment.
40710 SY 20100312-S00007 No.A1695-1/10
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LE24LA162CB pdf, 数据表
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LE24LA162CB
7 EEPROM read operations
7-1. Current address reading
The address equivalent to the memory address accessed last +1 is held as the internal address of the EEPROM for
both write* and read operations. Therefore, provided that the master device has recognized the position of the
EEPROM address pointer, data can be read from the memory address with the current address pointer without
specifying the word address.
As with writing, current address reading involves receiving the 7-bit device address and read command code “1”
following the start condition, at which time the EEPROM generates an acknowledge signal. After this, the 8-bit data
of the (n+1) address is output serially starting with the highest bits. After the 8 bits have been output, by not sending
an acknowledge signal and inputting the stop condition, the EEPROM completes the read operation and is set to
standby mode.
If the previous read address is the last address, the address for the current address reading is rolled over to become
address 0.
*: If the write data is 1 or more bytes but less than 16 bytes, the current address after page writing is the address
equivalent to the number of bytes to be written in the specified word address +1. If the write data is 16 or more bytes,
it is the designated word address. If the last address (A3-A0=1111b) on the page has been designated by byte write as
the word address, the first address (A3-A0=0000b) on the page serves as the internal address after writing.
Device Address Data(n+1 address)
SDA
1
0
1
0
A
10
A9 A8
R
D7 D6 D5 D4D3 D2 D1 D0
ACK
R/W
NO ACK
7-2. Random read
Random read is a mode in which a selected memory address is specified and its data is read. The address is specified
by a dummy write input.
First, when the EEPROM receives the 7-bit device address and write command code "0" following the start condition,
it generates an acknowledge signal. It then receives 4-bit don’t-care bits and a 12-bit word address and generates an
acknowledge signal. These operations are used to load the word address to the address counter in the EEPROM.
Next, the start condition is input again, and the current read is performed. This generates the word address data that
was input using the dummy write input. After the data is generated, if the stop condition is input without the input of
an acknowledge signal, reading is completed, and standby mode is established.
SDA
Device Address
Word Address
Device Address
Data(n)
1
0
1
0
A
10
A9
A8
W
A7 A6 A5 A4 A3 A2 A1 A0
ACK
R/W
Dummy Write
1
0
1
0
A
10
A9
A8
R
D7 D6
ACK
ACK
R/W
Current Read
D1 D0
NO ACK
7-3. Sequential read
In this mode, the data is read continuously, and sequential read operations can be performed with both current address
read and random read. If, after the 8-bit data has been output, acknowledge “0” is input and reading is continued
without issuing the stop condition, the address is incremented, and the data of the next address is output.
If acknowledge “0” continues to be input after the data has been output in this way, the data is successively output
while the address is incremented. When the last address is reached, it is rolled over to address 0, and the data
continues to be read. As with current address read and random read, the operation is completed by inputting the stop
condition without sending an acknowledge signal.
SDA
Device Address
Data(n)
Data(n+1)
Data(n+2)
Data(n+x)
1
0
1
0
A
10
A9
A8
R
D7 D6 D1 D0 D7 D6 D1 D0 D7 D6 D1 D0
D7 D6 D1 D0
ACK
R/W
ACK
ACK
ACK
ACK
No.A1695-8/10
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