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PDF ( 数据手册 , 数据表 ) SX1239

零件编号 SX1239
描述 Low Power Integrated UHF Receiver
制造商 Semtech Corporation
LOGO Semtech Corporation LOGO 


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SX1239 数据手册, 描述, 功能
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SX1239
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
SX1239 Receiver
Low Power Integrated UHF Receiver
RFIN
VBAT1&2
VR_ANA
VR_DIG
Power Distribution System
LNA
Single to
Differential
Mixers
Σ/Δ
Modulators
RC
Oscillator
RESET
SPI
Division by
2, 4 or 6
RSSI
AFC
GND
Tank
Inductor
Loop Frac-N PLL
NC Filter Synthesizer
NC
NC XO
32 MHz
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
XTAL
GENERAL DESCRIPTION
The SX1239 is a highly integrated RF receiver capable of
operation over a wide frequency range, including the 433,
868 and 915 MHz license-free ISM (Industry Scientific and
Medical) frequency bands. Its highly integrated architecture
allows for a minimum of external components whilst
maintaining maximum design flexibility. All major RF
communication parameters are programmable and most of
them can be dynamically set. The SX1239 offers the unique
advantage of programmable narrow-band and wide-band
communication modes without the need to modify external
components. The SX1239 is optimized for low power
consumption while offering high sensitivity and channelized
operation. TrueRF™ technology enables a lowcost external
component count (elimination of the SAW filter) whilst still
satisfying ETSI and FCC regulations.
APPLICATIONS
Š Automated Meter Reading
Š Wireless Sensor Networks
Š Home and Building Automation
Š Wireless Alarm and Security Systems
Š Industrial Monitoring and Control
GND
KEY PRODUCT FEATURES
Š High Sensitivity: down to -120 dBm at 1.2 kbps
Š High Selectivity: 16-tap FIR Channel Filter
Š Bullet-proof front end: IIP3 = -18 dBm, IIP2 = +35 dBm,
80 dB Blocking Immunity, no Image Frequency response
Š Low current: Rx = 16 mA, 100nA register retention
Š Constant RF performance over voltage range of chip
Š FSK Bit rates up to 300 kb/s
Š Fully integrated synthesizer with a resolution of 61 Hz
Š FSK, GFSK, MSK, GMSK and OOK demodulation
Š Built-in Bit Synchronizer performing Clock Recovery
Š Incoming Sync Word Recognition
Š 115 dB+ Dynamic Range RSSI
Š Automatic RF Sense with ultra-fast AFC
Š Packet engine with CRC, AES-128 encryption and 66-
byte FIFO
Š Built-in temperature sensor and Low Battery indicator
ORDERING INFORMATION
MARKETS
Š Europe: EN 300-220-1
Š North America: FCC Part 15.247, 15.249, 15.231
Š Narrow Korean and Japanese bands
Part Number
SX1239IMLTRT
Delivery
Tape & Reel
MOQ / Multiple
3000 pieces
Š QFN 24 Package - Operating Range [-40;+85°C]
Š Pb-free, Halogen free, RoHS/WEEE compliant product
Rev 2 - April 2010
Page 1
www.semtech.com
Datasheet pdf - http://www.DataSheet4U.net/







SX1239 pdf, 数据表
www.DataSheet.co.kr
SX1239
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
This product datasheet contains a detailed description of the SX1239 performance and functionality. Please consult the
Semtech website for the latest updates or errata.
Refer to section 9 of this document to identify chip revisions.
1. General Description
The SX1239 is a single-chip integrated circuit ideally suited for today's high performance ISM band RF applications. The
SX1239's advanced features set, including state of the art packet engine greatly simplifies system design whilst the high
level of integration reduces the external BOM to a handful of passive decoupling and matching components. It is intended
for use as high-performance, low-cost FSK and OOK RF receiver for robust frequency agile RF links, and where stable
and constant RF performance is required over the full operating range of the device down to 1.8V.
The SX1239 is intended for applications over a wide frequency range, including the 433 MHz and 868 MHz European and
the 902-928 MHz North American ISM bands. Coupled with a very aggressive sensitivity, the advanced system features of
the SX1239 include a 66 byte RX FIFO, configurable automatic packet handler, listen mode, temperature sensor and
configurable DIOs which greatly enhance system flexibility whilst at the same time significantly reducing MCU
requirements.
The SX1239 complies with both ETSI and FCC regulatory requirements and is available in a 5 x 5 mm QFN 24 lead
package
1.1. Simplified Block Diagram
VBAT1&2
VR_ANA
VR_DIG
Power Distribution System
RC
Oscillator
RFIN
LNA Σ/Δ
Single to
Mixers
Modulators
Differential
RESET
SPI
Division by
2, 4 or 6
RSSI
AFC
GND
Tank
Inductor
NC
Loop Frac-N PLL
Filter Synthesizer
NC
NC XO
32 MHz
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
Frequency Synthesis
Receiver Blocks
XTAL
GND
Control Blocks
Primarily Analog
Primarily Digital
Figure 1. Block Diagram
Rev 2 - April 2010
Page 8
www.semtech.com
Datasheet pdf - http://www.DataSheet4U.net/







SX1239 equivalent, schematic
www.DataSheet.co.kr
SX1239
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
3.3.2. CLKOUT Output
The reference frequency, or a fraction of it, can be provided on DIO5 (pin 12) by modifying bits ClkOut in RegDioMapping2.
Two typical applications of the CLKOUT output include:
Š To provide a clock output for a companion processor, thus saving the cost of an additional oscillator. CLKOUT can be
made available in any operation mode except Sleep mode and is automatically enabled at power on reset.
Š To provide an oscillator reference output. Measurement of the CLKOUT signal enables simple software trimming of the
initial crystal tolerance.
Note to minimize the current consumption of the SX1239, please ensure that the CLKOUT signal is disabled when not
required.
3.3.3. PLL Architecture
The frequency synthesizer generating the LO frequency for the receiver is a fractional-N sigma-delta PLL. The PLL
incorporates a third order loop capable of fast auto-calibration, and it has a fast switching-time. The VCO and the loop filter
are both fully integrated, removing the need for an external tight-tolerance, high-Q inductor in the VCO tank circuit.
3.3.3.1. VCO
The VCO runs at 2, 4 or 6 times the RF frequency (respectively in the 915, 434 and 315 MHz bands) to reduce any LO
leakage in receiver mode, to improve the quadrature precision of the receiver.
The VCO calibration is fully automated. A coarse adjustment is carried out at power on reset, and a fine tuning is
performed each time the SX1239 PLL is activated. Automatic calibration times are fully transparent to the end-user, as their
processing time is included in the TS_RE specifications.
3.3.3.2. PLL Bandwidth
The bandwidth of the SX1239 Fractional-N PLL is wide enough to allow for very fast PLL lock times, enabling both short
startup and fast hop times required for frequency agile applications.
3.3.3.3. Carrier Frequency and Resolution
The SX1239 PLL embeds a 19-bit sigma-delta modulator and its frequency resolution, constant over the whole frequency
range, and is given by:
FSTEP
=
F----X----O---S---C--
219
The carrier frequency is programmed through RegFrf, split across addresses 0x07 to 0x09:
FRF = FSTEP × Frf(23,0)
Note The Frf setting is split across 3 bytes. A change in the center frequency will only be taken into account when the
least significant byte FrfLsb in RegFrfLsb is written.
Rev 2 - April 2010
Page 16
www.semtech.com
Datasheet pdf - http://www.DataSheet4U.net/










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