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PDF ( 数据手册 , 数据表 ) F81216AD

零件编号 F81216AD
描述 LPC to 4 UART + 9-bit Protocol
制造商 Feature Integration Technology
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F81216AD 数据手册, 描述, 功能
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F81216AD
F81216AD
LPC to 4 UART + 9-bit Protocol
Release Date: July, 2008
Version: V0.20P
F81216AD.
July, 2008
V0.20P







F81216AD pdf, 数据表
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F81216AD
25 SIN3
INt5V
Serial Input. Used to receive serial data through the
communication link.
26 SOUT3
I/O8t5V-d100
UART 3 Serial Output. Used to transmit serial data out to the
communication link.
PS_3E8_IRQC
Power setting pin to define the IRQC index.
Default PS_3E8_IRQC = 0, IRQF index is programmed by
register.
If PS_3E8_IRQC = 1, setting IRQC index to 0x3E8.
27 DCD3#
INt5V
Data Carrier Detect. An active low signal indicates the
modem or data set has detected a data carrier.
28 RI3#
31 CTS2#
32 DSR2#
33 RTS2#
INt5V
INt5V
INt5V
I/O8t5V-d100
Ring Indicator. An active low signal indicates that a ring
signal is being received from the modem or data set.
Clear To Send is the modem control input.
Data Set Ready. An active low signal indicates the modem or
data set is ready to establish a communication link and transfer
data to the UART.
UART 2 Request To Send. An active low signal informs the
modem or data set that the controller is ready to send data.
PS_CONF_KE
Y1
Power on configuration setting pin. As for detail description,
please refer to register description.
34 DTR2#
I/O8t5V-d100
UART 2 Data Terminal Ready. An active low signal informs
the modem or data set that controller is ready to communicate.
PS_2E0_IRQB
Power setting pin to define the IRQB index.
Default PS_2E0_IRQB = 0, IRQB index is programmed by
register.
If PS_2E0_IRQB = 1, setting IRQB index to 0x2E0.
35 SIN2
INt5V
Serial Input. Used to receive serial data through the
communication link.
36 SOUT2
I/O8t5V-d100
UART 2 Serial Output. Used to transmit serial data out to the
communication link.
PS_2F8_IRQB
Power setting pin to define the IRQB index.
Default PS_2F8_IRQB = 0, IRQB index is programmed by
register.
If PS_2F8_IRQB = 1, setting IRQB index to 0x2F8.
-5- July, 2008
V0.20P







F81216AD equivalent, schematic
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5 DSR
4 CTS
3 DDCD
F81216AD
OUT1 in MCR
R Complement of DSR# input. In loop back mode , this bit is
equivalent to DTR in MCR
R Complement of CTS# input. In loop back mode , this bit is equivalent
to RTS in MCR
R 0 : No state changed at DCD#.
1 : State changed at DCD#.
2 TERI
1 DDSR
0 DCTS
R 0 : No Trailing edge at RI#.
1 : A low to high transition at RI#.
R 0 : No state changed at DSR#.
1 : State changed at DSR#.
R 0 : No state changed at CTS#.
1 : State changed at CTS#.
5.2.1.11 Scratch Register – Base + 7
Power-on default [7:0] = 0x00h.
Bit Name R/W
7:0 SCR_DATA[7:0] R/W Scratch register.
Description
5.3 IR Function
The F81216AD infrared interface provides a two way wireless communications port using
infrared as the transmission medium. The IrDA 1.0 (SIR) is found in UART1 IrDA SIR specifies
asynchronous serial communication at baud rate up to 115.2Kbps. Each byte is sent serial LSB first
beginning with a zero value start bit. A zero is signaled by sending a single infrared pulse at the
beginning of the serial bit time. A one is signaled by the absence of an infrared pulse during the bit
time. IRTX acts as a transmit pin and IRRX acts as a receiving one. As for detail description, please
refer to register description.
5.4 Watch Dog Timer Function
Watch dog timer is provided for system controlling. If time-out can trigger one signal to low
level, the signal default is tri-state (need external pull up resister).
The time interval has three ways:
One is the hardware power on setting to enable, timer set to 10 second (24MHz). If 48MHz
clock input, the timer is set to 5 second.
-13- July, 2008
V0.20P










页数 30 页
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