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PDF ( 数据手册 , 数据表 ) K8A56ETC

零件编号 K8A56ETC
描述 256Mb C-die NOR FLASH
制造商 Samsung semiconductor
LOGO Samsung semiconductor LOGO 


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K8A56ETC 数据手册, 描述, 功能
Rev. 1.0, Nov. 2010
K8A56(57)ET(B)(Z)C
256Mb C-die NOR FLASH
16M x16, Synch Burst
Multi Bank SLC NOR Flash
datasheet
SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
SPECIFICATIONS WITHOUT NOTICE.
Products and specifications discussed herein are for reference purposes only. All information discussed
herein is provided on an "AS IS" basis, without warranties of any kind.
This document and all information discussed herein remain the sole and exclusive property of Samsung
Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property
right is granted by one party to the other party under this document, by implication, estoppel or other-
wise.
Samsung products are not intended for use in life support, critical care, medical, safety equipment, or
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military or defense application, or any governmental procurement to which special terms or provisions
may apply.
For updates or additional information about Samsung products, contact your nearest Samsung office.
www.DataSAhlel berta4nUd.cnoammes, trademarks and registered trademarks belong to their respective owners.
2009 Samsung Electronics Co., Ltd. All rights reserved.
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K8A56ETC pdf, 数据表
K8A56(57)15ET(B)(Z)C
datasheet
NOR
FLASH
Rev.
MEMORY
1.0
6.0 ORDERING INFORMATION
K8 A 56 15 E T C - S E 1E
Samsung
NOR Flash Memory
Access Time
1E : Refer to Table 1
Device Type
A : De-Multiplexed Burst
Density(*Note)
54 : 256Mbits for 66/83MHz(Sync MRS)
55 : 256Mbits for 108/133MHz(Sync MRS)
56 : 256Mbits for 66/83MHz(No option)
57 : 256Mbits for 108/133MHz(No option)
Organization
15 : x16 Organization
Operating Voltage Range
E : 1.7 V to 1.95V
NOTE :
Density : (1) 54 : 256Mb for 66/83Mhz with the Sync MRS option
(2) 55 : 256Mb for 108/133Mhz with the Sync MRS option
(3) 56 : 256Mb for 66/83Mhz with no option
(4) 57 : 256Mb for 108/133Mhz with no option
Operating Temperature Range
C : Commercial Temp. (0 °C to 70 °C)
E : Extended Temp. (-25 °C to 85 °C)
Package
F : FBGA D : FBGA(Lead Free)
S : FBGA(Lead Free, OSP)
Version
C : 4th Generation
Block Architecture
T : Top Boot Block, B : Bottom Boot Block
Z : Uniform Block
[Table 1] PRODUCT LINE-UP
Mode
VCC=1.7V
-1.95V
Synchronous/
Burst
Asynchronous
K8A(56/57)15E
Speed Option
Max. Initial Access Time (tIAA, ns)
Max. Burst Access Time (tBA, ns)
Max. Access Time (tAA, ns)
Max. CE Access Time (tCE, ns)
Max. OE Access Time (tOE, ns)
1C
(66MHz)
95
11
100
100
15
1D
(83MHz)
95
9
100
100
15
1E
(108MHz)
95
7
100
100
15
1F
(133MHz)
95
6
100
100
15
[Table 2] PRODUCT Classification
Speed/Boot Option
256Mb for 66/83MHz
256Mb for 108/133MHz
Top
K8A5615ETC
K8A5715ETC
Bottom
K8A5615EBC
K8A5715EBC
Uniform
K8A5615EZC
K8A5715EZC
[Table 3] K8A(56/57)15E DEVICE BANK DIVISIONS
Mbit
256Mbit (Boot block part)
256Mbit (Uniform block part)
www.DataSheet4U.com
Bank 0 ~ Bank 15
Block Sizes
Four 16Kword blocks and two hundred fifty-five 64Kword blocks
Two hundred fifty-six 64Kword blocks
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K8A56ETC equivalent, schematic
K8A56(57)15ET(B)(Z)C
datasheet
NOR
FLASH
Rev.
MEMORY
1.0
[Table 10] Burst Mode Configuration Register Table : K8A54(55)15ET(B)(Z)C : 66/83/108/133Mhz with the Sync MRS option
Address Bit
Function
Settings(Binary)
A19
Read Mode
1 = Synchronous Burst Read Mode
0 = Asynchronous Read Mode (default)
A18
RDY Active
1 = RDY active one clock cycle before data
0 = RDY active with data(default)
A17 000 = Continuous(default)
A16
Burst Read Mode
001 = 8-word linear with wrap
010 = 16-word linear with wrap
A15 011~111 = Reserve
A14 0000 = Data is valid on the 4th active CLK edge after AVD transition to VIH
A13
0001 = Data is valid on the 5th active CLK edge after AVD transition to VIH (40Mhz*)
0010 = Data is valid on the 6th active CLK edge after AVD transition to VIH (50/54Mhz*)
A12 0011 = Data is valid on the 7th active CLK edge after AVD transition to VIH (60/66Mhz*)
0100 = Data is valid on the 8th active CLK edge after AVD transition to VIH (70Mhz*)
Programmable Wait State
0101 = Data is valid on the 9th active CLK edge after AVD transition to VIH (80/83Mhz*)
0110 = Data is valid on the 10th active CLK edge after AVD transition to VIH (90/100Mhz*)
0111 = Data is valid on the 11th active CLK edge after AVD transition to VIH (108/110Mhz*)
A11 1000 = Data is valid on the 12th active CLK edge after AVD transition to VIH (120Mhz*)
1001 = Data is valid on the 13th active CLK edge after AVD transition to VIH (133Mhz*,default)
1010 = Data is valid on the 14th active CLK edge after AVD transition to VIH
1011 = Data is valid on the 15th active CLK edge after AVD transition to VIH
NOTE :
Initial wait state should be set according to it’s clock frequency. Table 10 recommend the program wait state for each clock frequencies.
Not 100% tested
[Table 11] Burst Mode Configuration Register Table : K8A56(57)15ET(B)(Z)C : 66/83/108/133Mhz with no option
Address Bit
Function
Settings(Binary)
A18
RDY Active
1 = RDY active one clock cycle before data
0 = RDY active with data(default)
A17 000 = Continuous(default)
A16
Burst Read Mode
001 = 8-word linear with wrap
010 = 16-word linear with wrap
A15 011~111 = Reserve
A14 0000 = Data is valid on the 4th active CLK edge after AVD transition to VIH
A13
0001 = Data is valid on the 5th active CLK edge after AVD transition to VIH (40Mhz*)
0010 = Data is valid on the 6th active CLK edge after AVD transition to VIH (50/54Mhz*)
A12 0011 = Data is valid on the 7th active CLK edge after AVD transition to VIH (60/66Mhz*)
0100 = Data is valid on the 8th active CLK edge after AVD transition to VIH (70Mhz*)
Programmable Wait State
0101 = Data is valid on the 9th active CLK edge after AVD transition to VIH (80/83Mhz*)
0110 = Data is valid on the 10th active CLK edge after AVD transition to VIH (90/100Mhz*)
0111 = Data is valid on the 11th active CLK edge after AVD transition to VIH (108/110Mhz*)
A11 1000 = Data is valid on the 12th active CLK edge after AVD transition to VIH (120Mhz*)
1001 = Data is valid on the 13th active CLK edge after AVD transition to VIH (133Mhz*,default)
1010 = Data is valid on the 14th active CLK edge after AVD transition to VIH
1011 = Data is valid on the 15th active CLK edge after AVD transition to VIH
[Table 12] Burst Address Sequences
Start
Addr.
0
1
www.DWaratapSheet4U.com2
.
.
Continuous Burst
0-1-2-3-4-5-6...
1-2-3-4-5-6-7...
2-3-4-5-6-7-8...
.
.
Burst Address Sequence
8-word Burst
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
2-3-4-5-6-7-0-1
.
.
16-word Burst
0-1-2-3 ... -D-E-F
1-2-3-4 ... -E-F-0
2-3-4-5 ... -F-0-1
.
.
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