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PDF ( 数据手册 , 数据表 ) 34AA02

零件编号 34AA02
描述 2K I2C Serial EEPROM Software Write-Protect
制造商 Microchip Technology
LOGO Microchip Technology LOGO 


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34AA02 数据手册, 描述, 功能
34AA02/34LC02
2K I2CSerial EEPROM Software Write-Protect
Features:
• Permanent and Resettable Software Write-Protect
for Lower Half of the Array (00h-7Fh)
• Single Supply with Operation Down to 1.7V
• Low-Power CMOS Technology:
- Read current 1 mA, typical
- Standby current, 100 nA, typical
• 2-Wire Serial Interface Bus, I2C™ Compatible
• Cascadable up to Eight Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz and 400 kHz Compatibility
• 1 MHz Clock for LC Versions
• Page Write Time 3 ms, typical
• Self-Timed Erase/Write Cycle
• 16-Byte Page Write Buffer
• ESD Protection > 4,000V
• Software Write Protection for Lower 128 Bytes
• Hardware Write Protection for Entire Array
• More than 1 Million Erase/Write Cycles
• Data Retention > 200 Years
• 8-Lead PDIP, SOIC, TSSOP, MSOP and TDFN
Packages
• 6-Lead SOT-23 Package
• Pb-free and RoHS Compliant
• Available for Extended Temperature Ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
Device Selection Table
Part
Number
VCC
Range
Max. Clock
Frequency
34AA02
34LC02
1.7-5.5
2.2-5.5
400 kHz(1)
1 MHz
Note 1: 100 kHz for VCC <1.8V.
Temp
Ranges
I,E
I,E
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Package Types
PDIP/SOIC/TSSOP/MSOP/TDFN
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 WP
6 SCL
5 SDA
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 WP
6 SCL
5 SDA
SOT-23
SCL 1
VSS 2
SDA 3
6 VCC
5 A0
4 A1
Description:
The Microchip Technology Inc. 34AA02/34LC02
(34XX02*) is a 2 Kbit Electrically Erasable PROM
capable of operation across a broad voltage range
(1.7V to 5.5V). This device has two software write-
protect features for the lower half of the array, as well
as an external pin that can be used to write-protect the
entire array. This allows the system designer to protect
none, half, or all of the array, depending on the
application. The device is organized as one block of
256 x 8-bit memory with a 2-wire serial interface. Low-
voltage design permits operation down to 1.7V, with
standby and active currents of only 100 nA and 1 mA,
respectively. The 34XX02 also has a page write
capability for up to 16 bytes of data. The 34XX02 is
available in the standard 8-pin PDIP, surface mount
SOIC, TSSOP, MSOP and TDFN packages. The
34XX02 is also available in the 6-lead, SOT-23
package.
*34XX02 is used in this document as a generic part number
for the 34AA02/34LC02 devices.
2011 Microchip Technology Inc.
DS22029F-page 1







34AA02 pdf, 数据表
34AA02/34LC02
4.2 Page Write
The write control byte, word address and the first data
byte are transmitted to the 34XX02 in the same way as
in a byte write. Instead of generating a Stop condition,
the master transmits up to 15 additional data bytes to
the 34XX02, which are temporarily stored in the on-
chip page buffer and will be written into the memory
after the master has transmitted a Stop condition. Upon
receipt of each word, the four lower order Address
Pointer bits are internally incremented by one. The
higher order four bits of the word address remain
constant. If the master should transmit more than 16
bytes prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the Stop condition is received, an
internal write cycle will begin (Figure 4-2). If an attempt
is made to write to the array when the hardware write
protection has been enabled, the device will acknowl-
edge the command, but no data will be written. The
write cycle time must be observed even if the write
protection is enabled.
FIGURE 4-1:
Bus Activity
Master
SDA Line
BYTE WRITE
S
T Control
A
R
Byte
T
S
Bus Activity
A
C
K
Note:
Page write operations are limited to
writing bytes within a single physical page,
regardless of the number of bytes actually
being written. Physical page boundaries
start at addresses that are integer multi-
ples of the page buffer size (or ‘page size’)
and end at addresses that are integer mul-
tiples of [page size – 1]. If a Page Write
command attempts to write across a phys-
ical page boundary, the result is that the
data wraps around to the beginning of the
current page (overwriting data previously
stored there), instead of being written to
the next page, as might be expected. It is
therefore necessary for the application
software to prevent page write operations
that would attempt to cross a page
boundary.
Word
Address
A
C
K
Data
S
T
O
P
P
A
C
K
FIGURE 4-2:
Bus Activity
Master
SDA Line
Bus Activity
PAGE WRITE
S
T Control
A
R
Byte
T
Word
Address (n)
S
AA
CC
KK
Data (n)
Data (n + 1)
Data (n + 15)
S
T
O
P
P
AAA
CCC
KKK
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DS22029F-page 8
2011 Microchip Technology Inc.







34AA02 equivalent, schematic
34AA02/34LC02
6-Lead SOT-23
XXNN
Example:
SKEC
SOT-23 Marking Codes
Device
I-Temp E-Temp
34AA02
SKNN SLNN
34LC02
STNN SUNN
Pb-free topside mark is same; Pb-free
noted only on carton label.
Legend:
XX...X
T
Y
YY
WW
NNN
e3
Part number or part number code
Temperature (I, E)
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
Note:
For very small packages with no room for the Pb-free JEDEC designator
e3 , the marking will only appear on the outer carton or reel label.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Note: Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.
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DS22029F-page 16
2011 Microchip Technology Inc.










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