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PDF ( 数据手册 , 数据表 ) RE46C190

零件编号 RE46C190
描述 CMOS Low Voltage Photoelectric Smoke Detector ASIC
制造商 Microchip Technology
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RE46C190 数据手册, 描述, 功能
RE46C190www.DataSheet4U.com
CMOS Low Voltage Photoelectric Smoke Detector ASIC
with Interconnect and Timer Mode
Features
• Two AA Battery Operation
• Internal Power On Reset
• Low Quiescent Current Consumption
• Available in 16L N SOIC
• Local Alarm Memory
• Interconnect up to 40 Detectors
• 9 Minute Timer for Sensitivity Control
• Temporal or Continuous Horn Pattern
• Internal Low Battery and Chamber Test
• All Internal Oscillator
• Internal Infrared Emitter Diode (IRED) driver
• Adjustable IRED Drive current
• Adjustable Hush Sensitivity
• 2% Low Battery Set Point
Description
The RE46C190 is a low power, low voltage CMOS
photoelectric type smoke detector IC. With minimal
external components, this circuit will provide all the
required features for a photoelectric-type smoke
detector.
The design incorporates a gain-selectable photo
amplifier for use with an infrared emitter/detector pair.
An internal oscillator strobes power to the smoke
detection circuitry every 10 seconds, to keep the
standby current to a minimum. If smoke is sensed, the
detection rate is increased to verify an Alarm condition.
A high gain mode is available for push button chamber
testing.
A check for a low battery condition is performed every
86 seconds, and chamber integrity is tested once every
43 seconds, when in Standby. The temporal horn pat-
tern supports the NFPA 72 emergency evacuation sig-
nal.
An interconnect pin allows multiple detectors to be
connected such that, when one unit alarms, all units will
sound.
An internal 9 minute timer can be used for a Reduced
Sensitivity mode.
Utilizing low power CMOS technology, the RE46C190
was designed for use in smoke detectors that comply
with Underwriters Laboratory Specification UL217 and
UL268.
PIN CONFIGURATION
VSS
IRED
VDD
TEST
TEST2
IRP
IRN
RLED
RE46C190
SOIC
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
LX
VBST
HS
HB
IO
IRCAP
FEED
GLED
2010 Microchip Technology Inc.
DS22271A-page 1







RE46C190 pdf, 数据表
RE46C190
AC ELECTRICAL CHARACTERISTICS
AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10° to +60°C, VDwDw=w3.VD, ataSheet4U.com
VBST = 4.2V, Typical Application (unless otherwise noted) (Note 1 to Note 4).
Parameter
Symbol Test Pin Min
Typ
Max Units
Condition
Time Base
Internal Clock Period
TPCLK
9.80 10.4 11.0
ms PROGSET,
IO = high
RLED Indicator
On Time
Standby Period
Local Alarm Period
TON1
TPLED1
TPLED2A
8
8
8
TPLED2B
8
Hush Timer Period
External Alarm
Period
TPLED4
TPLED0
8
8
9.80 10.4 11.0
320 344 368
470 500 530
625 667 710
10 10.7 11.4
LED IS NOT ON
ms Operating
s Standby, no alarm
ms Local alarm condition
with temporal horn
pattern
ms Local alarm condition
with continuous horn
pattern
s Timer mode, no local
alarm
s Remote alarm only
GLED Indicator
Latched Alarm Period TPLED3
Latched Alarm Pulse
Train (3x) Off Time
Latched Alarm LED
Enabled Duration
TOFLED
TLALED
9
9
9
40 43 46
s Latched Alarm Condition,
LED enabled
1.25 1.33 1.41
s Latched Alarm Condition,
LED enabled
22.4 23.9 25.3 Hours Latched Alarm Condition,
LED enabled
Smoke Check
Smoke Test Period
with Temporal Horn
Pattern
TPER0A
TPER1A
2
2
10 10.7 11.4
1.88 2.0 2.12
s Standby, no alarm
s Standby, after one valid
smoke sample
TPER2A
2
0.94
1.0
1.06
s Standby,
after two consecutive
valid smoke samples
TPER3A
2
0.94
1.0
1.06
s Local Alarm
(three consecutive valid
smoke samples)
TPER4A
2
235 250 265
ms Push button test,
>1 chamber detections
313 333 353
ms Push button test,
no chamber detections
TPER5A
2
7.5
8.0
Note 1: See timing diagram for Horn Pattern (Figure 5-2).
8.5
s In remote alarm
2: TPCLK and TIRON are 100% production tested. All other AC parameters are verified by functional testing.
3: Typical values are for design information only.
4: Limits over the specified temperature range are not production tested, and are based on characterization
data.
DS22271A-page 8
2010 Microchip Technology Inc.







RE46C190 equivalent, schematic
RE46C190
4.1 Calibration and Programming
Procedures
Eleven separate programming and test modes are
available for user customization. To enter these modes,
after power-up, TEST2 must be driven to VDD and held
at that level. The TEST input is then clocked to step
through the modes. FEED and IO are reconfigured to
become test mode inputs, while RLED, GLED and HB
become test mode outputs. The test mode functions for
each pin are outlined in Table 4-3.
When TEST2 is held at VDD, TEST becomes a tri-state
input with nominal input levels at VSS, VDD awndwVwB.SDTa. tAaSheet4U.com
TEST clock occurs whenever the TEST input switches
from VSS to VBST. The TEST Data column represents
the state of TEST when used as a data input, which
would be either VSS or VDD. The TEST pin can
therefore be used as both a clock, to change modes,
and a data input, once a mode is set. Other pin
functions are described in Section 4.2 “User
Selections”.
TABLE 4-3: TEST MODE FUNCTIONS
Description
TEST
Clock
TEST
Data
TEST2
FEED
IO RLED GLED HB
VIH
VIL
T0 Photo Gain Factor
(2 bits)
VBST
VSS
0
VDD
VSS
ProgData
VDD
VSS
VDD
VBST
VDD
VSS
VSS
ProgCLK ProgEn 14 bits RLED
GLED
HB
Integ Time (2 bits)
IRED Current (2 bits)
Low Battery Trip
(3 bits)
0 ProgData VDD ProgCLK ProgEn 14 bits RLED GLED
0 ProgData VDD ProgCLK ProgEn 14 bits RLED GLED
0 ProgData VDD ProgCLK ProgEn 14 bits RLED GLED
HB
HB
HB
LTD Enable (1 bit)
Hush Option (1 bit)
LB Hush Enable
(1 bit)
0 ProgData VDD ProgCLK ProgEn 14 bits RLED GLED
0 ProgData VDD ProgCLK ProgEn 14 bits RLED GLED
0 ProgData VDD ProgCLK ProgEn 14 bits RLED GLED
HB
HB
HB
EOL Enable (1 bit)
Tone Select (1 bit)
T1 Norm Lim Set
(5 bits)( 4)
0 ProgData VDD ProgCLK ProgEn 14 bits RLED GLED
HB
0 ProgData VDD ProgCLK ProgEn 14 bits RLED GLED
HB
1 not used VDD CalCLK LatchLim( 3) Gamp IntegOut SmkComp( 1)
T2 Hyst Lim Set
(5 bits)( 4)
2 not used VDD CalCLK LatchLim( 3) Gamp IntegOut SmkComp( 1)
T3 Hush Lim Set
(5 bits)( 4)
3 not used VDD CalCLK LatchLim( 3) Gamp IntegOut SmkComp( 1)
T4 Ch Test Lim Set
(5 bits)( 4)
4 not used VDD CalCLK LatchLim( 3) Gamp IntegOut SmkComp( 1)
T5 LTD Baseline (5 bits) 5 not used VDD MeasEn ProgEn 25 bits Gamp IntegOut SmkComp( 1)
T6 Serial Read/Write
6 ProgData VDD ProgCLK
ProgEn
RLED GLED Serial Out
T7 Norm Lim Check
7 not used VDD MeasEn
not used
Gamp IntegOut SCMP( 2)
T8 Hyst Lim Check
8 not used VDD MeasEn
not used
Gamp IntegOut SCMP( 2)
T9 Hush Lim Check
9 not used VDD MeasEn
not used
Gamp IntegOut SCMP( 2)
T10 Ch Test Lim Check
10 not used VDD MeasEn
not used
Gamp IntegOut SCMP( 2)
T11 Horn Test
11 not used VDD FEED
HornEn RLED GLED
HB
Note 1: SmkComp (HB) – digital comparator output (high if Gamp < IntegOut; low if Gamp > IntegOut)
2: SCMP (HB) – digital output representing comparison of measurement value and associated limit. Signal is
valid only after MeasEn has been asserted and measurement has been made. (SCMP high if measured
value > limit; low if measured value < limit).
3: LatchLim (IO) – digital input used to latch present state of limits (Gamp level) for later storage. T1-T4 limits
are latched, but not stored until ProgEn is asserted in T5 mode.
4: Operating the circuit in this manner with nearly continuous IRED current for an extended period of time
may result in undesired or excessive heating of the part. The duration of this step should be minimized.
DS22271A-page 16
2010 Microchip Technology Inc.










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