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PDF ( 数据手册 , 数据表 ) 3B0365

零件编号 3B0365
描述 ICE3B0365
制造商 Infineon Technologies
LOGO Infineon Technologies LOGO 


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3B0365 数据手册, 描述, 功能
Datasheet, V1.3, 15 Sep 2004
C o o l S E T™-F3
ICE3A(B)0365/0565/1065/1565
ICE3A(B)2065/2565
ICE3A0565Z/2065Z
ICE3A(B)2065I/3065I/3565I
ICE3A(B)5065I/5565I
ICE3A(B)2065P/3065P/3565P
ICE3A(B)5065P/5565P
Off-Line SMPS Current Mode
Controller with integrated 650V
Startup Cell/CoolMOS™
Power Management & Supply
Never stop thinking.







3B0365 pdf, 数据表
CoolSET™-F3
Pin Configuration and Functionality
1.3 Pin Configuration with P-TO220-6-46 1.4 Pin Configuration with P-TO220-6-47
Pin Symbol Function
1 Drain 650V1) Depl-CoolMOS™ Drain
3 CS
Current Sense/
650V1) Depl-CoolMOS™ Source
4 GND Controller Ground
5 VCC Controller Supply Voltage
6 SoftS Soft-Start
7 FB
Feedback
1) at Tj = 110°C
Pin Symbol Function
1
Drain
650V1) Depl-CoolMOS™ Drain
3 CS
Current Sense/
650V1) Depl-CoolMOS™ Source
4 GND Controller Ground
5 VCC Controller Supply Voltage
6 SoftS Soft-Start
7 FB
Feedback
1) at Tj = 110°C
Package P-TO220-6-46
Package P-TO220-6-47
1 234567
1 234567
Figure 3 Pin Configuration P-TO220-6-46(top view) Figure 4 Pin Configuration P-TO220-6-47(top view)
Version 1.3
8 15 Sep 2004







3B0365 equivalent, schematic
CoolSET™-F3
Functional Description
via the gate G2. The external Soft Start capacitor can
now be charged further by the integrated pull up
resistor RSoftS. The comparator C3 releases the gates
G5 and G6 once VSofts has exceeded 5.4V. Therefore
there is no entering of Auto Restart Mode possible
during this charging time of the external capacitor
CSoftS. The same procedure happens to the external
Soft Start capacitor if a low load condition is detected
by comparator C5 when VFB is falling below 1.32V.
Only after VSoftS has exceeded 5.4V and VFB is still
below 1.32V Active Burst Mode is entered.
3.6.2
Active Burst Mode
The controller provides Active Burst Mode for low load
conditions at VOUT. Active Burst Mode increases
significantly the efficiency at light load conditions while
supporting a low ripple on VOUT and fast response on
load jumps. During Active Burst Mode which is
controlled only by the FB signal the IC is always active
and can therefore immediately response on fast
changes at the FB signal. The Startup Cell is kept
switched off to avoid increased power losses for the
self supply.
SoftS
6.5V
5k? RSoftS
4.4V
Internal Bias
The Active Burst Mode is located in the Control Unit.
Figure 17 shows the related components.
3.6.2.1 Entering Active Burst Mode
The FB signal is always observed by the comparator
C5 if the voltage level falls below 1.32V. In that case the
switch S1 is released which allows the capacitor CSoftS
to be charged starting from the clamped voltage level
at 4.4V in normal operating mode. If VSoftS exceeds
5.4V the comparator C3 releases the gate G6 to enter
the Active Burst Mode. The time window that is
generated by combining the FB and SoftS signals with
gate G6 avoids a sudden entering of the Active Burst
Mode due to large load jumps. This time window can be
adjusted by the external capacitor CSoftS.
After entering Active Burst Mode a burst flag is set and
the internal bias is switched off in order to reduce the
current consumption of the IC down to approx. 1.05mA.
In this Off State Phase the IC is no longer self supplied
so that therefore CVCC has to provide the VCC current
(see Figure 18). Furthermore gate G11 is then released
to start the next burst cycle once VFB has 3.4V
exceeded.
It has to be ensured by the application that the VCC
remains above the Undervoltage Lockout Level of 8.5V
to avoid that the Startup Cell is accidentally switched
on. Otherwise power losses are significantly increased.
The minimum VCC level during Active Burst Mode is
depending on the load conditions and the application.
The lowest VCC level is reached at no load conditions
at VOUT.
S1
5.4V
4.8V
C3
C4
FB
1.32V
C5
Current
Limiting
&
G10
Active
Burst
& Mode
G6
C6a
4.0V
&
C6b G11
3.4V Control Unit
Figure 18 Active Burst Mode
3.6.2.2 Working in Active Burst Mode
After entering the Active Burst Mode the FB voltage
rises as VOUT starts to decrease due to the inactive
PWM section. Comparator C6a observes the FB signal
if the voltage level 4V is exceeded. In that case the
internal circuit is again activated by the internal Bias to
start with switching. As now in Active Burst Mode the
gate G10 is released the current limit is only 0.257V to
reduce the conduction losses and to avoid audible
noise. If the load at VOUT is still below the starting level
for the Active Burst Mode the FB signal decreases
down to 3.4V. At this level C6b deactivates again the
internal circuit by switching off the internal Bias. The
gate G11 is released as after entering Active Burst
Mode the burst flag is set. If working in Active Burst
Mode the FB voltage is changing like a saw tooth
between 3.4V and 4V (see Figure 18).
3.6.2.3 Leaving Active Burst Mode
The FB voltage immediately increases if there is a high
load jump. This is observed by comparator C4. As the
current limit is ca. 26% during Active Burst Mode a
certain load jump is needed that FB can exceed 4.8V.
At this time C4 resets the Active Burst Mode which also
Version 1.3
16 15 Sep 2004










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