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PDF ( 数据手册 , 数据表 ) 93AA56C

零件编号 93AA56C
描述 (93AA56A/B/C) 2K Microwire Compatible Serial EEPROM
制造商 Microchip Technology
LOGO Microchip Technology LOGO 


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93AA56C 数据手册, 描述, 功能
www.DataSheet4U.com
93AA56A/B/C, 93LC56A/B/C,
93C56A/B/C
2K Microwire Compatible Serial EEPROM
Device Selection Table
Part Number VCC Range
93AA56A
93AA56B
93LC56A
93LC56B
93C56A
93C56B
93AA56C
93LC56C
93C56C
1.8-5.5
1.8-5-5
2.5-5.5
2.5-5.5
4.5-5.5
4.5-5.5
1.8-5.5
2.5-5.5
4.5-5.5
ORG Pin
No
No
No
No
No
No
Yes
Yes
Yes
Word Size
8-bit
16-bit
8-bit
16-bit
8-bit
16-bit
8 or 16-bit
8 or 16-bit
8 or 16-bit
Temp Ranges
I
I
I, E
I, E
I, E
I, E
I
I, E
I, E
Packages
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, OT, MC
P, SN, ST, MS, MC
P, SN, ST, MS, MC
P, SN, ST, MS, MC
Features:
• Low-power CMOS technology
• ORG pin to select word size for ‘56C’ version
• 256 x 8-bit organization ‘A’ ver. devices (no ORG)
• 128 x 16-bit organization ‘B’ ver. devices (no
ORG)
• Self-timed erase/write cycles (including
auto-erase)
• Automatic ERAL before WRAL
• Power-on/off data protection circuitry
• Industry standard 3-wire serial I/O
• Device Status signal (Ready/Busy)
• Sequential read function
• 1,000,000 E/W cycles
• Data retention > 200 years
• Pb-free and RoHS compliant
• Temperature ranges supported:
- Industrial (I)
-40°C to +85°C
- Automotive (E)
-40°C to +125°C
Pin Function Table
Name
Function
CS
CLK
DI
DO
VSS
NC
ORG
VCC
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
No internal connection
Memory Configuration
Power Supply
Description:
The Microchip Technology Inc. 93XX56A/B/C devices
are 2K bit low-voltage serial Electrically Erasable
PROMs (EEPROM). Word-selectable devices such as
the 93AA56C, 93LC56C or 93C56C are dependent
upon external logic levels driving the ORG pin to set
word size. For dedicated 8-bit communication, the
93XX56A devices are available, while the 93XX56B
devices provide dedicated 16-bit communication.
Advanced CMOS technology makes these devices
ideal for low-power, nonvolatile memory applications.
The entire 93XX Series is available in standard
packages including 8-lead PDIP and SOIC, and
advanced packaging including 8-lead MSOP, 6-lead
SOT-23, 8-lead 2x3 DFN and 8-lead TSSOP. All
packages are Pb-free and RoHS compliant.
© 2007 Microchip Technology Inc.
DS21794E-page 1







93AA56C pdf, 数据表
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
www.DataSheet4U.com
2.5 Erase All (ERAL)
The Erase All (ERAL) instruction will erase the entire
memory array to the logical ‘1’ state. The ERAL cycle
is identical to the erase cycle, except for the different
opcode. The ERAL cycle is completely self-timed and
commences at the falling edge of the CS, except on
‘93C’ devices where the rising edge of CLK before the
last data bit initiates the write cycle. Clocking of the
CLK pin is not necessary after the device has entered
the ERAL cycle.
The DO pin indicates the Ready/Busy status of the
device, if CS is brought high after a minimum of 250 ns
low (TCSL).
Note:
After the ERAL command is complete,
issuing a Start bit and then taking CS low
will clear the Ready/Busy status from DO.
VCC must be 4.5V for proper operation of ERAL.
FIGURE 2-3:
CS
ERAL TIMING FOR 93AA AND 93LC DEVICES
TCSL
Check Status
CLK
DI
1
00
10
x •••
x
High-Z
DO
VCC must be 4.5V for proper operation of ERAL.
FIGURE 2-4:
CS
ERAL TIMING FOR 93C DEVICES
TCSL
TSV
Busy
TEC
TCZ
Ready
High-Z
Check Status
CLK
DI
1
00
10
x •••
x
High-Z
DO
TSV
Busy
TEC
TCZ
Ready
High-Z
DS21794E-page 8
© 2007 Microchip Technology Inc.







93AA56C equivalent, schematic
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
www.DataSheet4U.com
6-Lead Plastic Small Outline Transistor (CH or OT) [SOT-23]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
b
N4
PIN 1 ID BY
LASER MARK
1
23
e
e1
D
E
E1
A A2 c
φ
A1 L
L1
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
N6
Pitch
e 0.95 BSC
Outside Lead Pitch
e1 1.90 BSC
Overall Height
A 0.90 – 1.45
Molded Package Thickness
A2 0.89 – 1.30
Standoff
A1 0.00 – 0.15
Overall Width
E 2.20 – 3.20
Molded Package Width
E1 1.30 – 1.80
Overall Length
D 2.70 – 3.10
Foot Length
L 0.10 – 0.60
Footprint
L1 0.35 – 0.80
Foot Angle
φ
– 30°
Lead Thickness
c 0.08 – 0.26
Notes:
Lead Width
b 0.20 – 0.51
1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.127 mm per side.
2. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-028B
DS21794E-page 16
© 2007 Microchip Technology Inc.










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