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PDF ( 数据手册 , 数据表 ) BF1218

零件编号 BF1218
描述 Dual N-channel dual gate MOSFET
制造商 NXP Semiconductors
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BF1218 数据手册, 描述, 功能
BF1218
Dual N-channel dual gate MOSFET
Rev. 01 — 14 April 2010
www.DataSheet4U.com
Product data sheet
1. Product profile
CAUTION
1.1 General description
The BF1218 is a combination of two dual gate MOSFET amplifiers with shared source
and gate2 leads and an integrated switch. The integrated switch is operated by the gate1
bias of amplifier B.
The source and substrate are interconnected. Internal bias circuits enable DC stabilization
and a very good cross modulation performance during Automatic Gain Control (AGC).
Integrated diodes between the gates and source protect against excessive input voltage
surges. The transistor has a SOT363 micro-miniature plastic package.
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
1.2 Features and benefits
Two low noise gain controlled amplifiers in a single package. One with a fully
integrated bias and one with a partly integrated bias
Internal switch to save external components
Superior cross modulation performance during AGC
High forward transfer admittance
High forward transfer admittance to input capacitance ratio
1.3 Applications
Gain controlled low noise amplifiers for VHF and UHF applications with 5 V supply
voltage
digital and analog television tuners
professional communication equipment







BF1218 pdf, 数据表
NXP Semiconductors
www.DataSheet4U.com
BF1218
Dual N-channel dual gate MOSFET
20
ID
(mA)
16
12
8
4
001aaa558
32
ID
(mA)
24
16
8
001aaa559
(1)
(2)
(3)
(4)
(5)
(6)
0
012345
Vsup (V)
VDS(A) = VDS(B) = Vsup; VG2-S = 4 V; Tj = 25 C;
RG1 = 86 k(connected to ground); see Figure 3.
Fig 8.
Amplifier A: drain current of amplifier A as a
function of supply voltage of A and B
amplifier; typical values
120
Vunw
(dBμV)
110
001aac195
100
90
0
0246
VG2-S (V)
(1) VDS(B) = 5 V.
(2) VDS(B) = 4.5 V.
(3) VDS(B) = 4 V.
(4) VDS(B) = 3.5 V.
(5) VDS(B) = 3 V.
(6) VDS(B) = 2.5 V.
VDS(A) = 5 V; VG1-S(B) = 0 V; gate1 (AMP A) is open;
Tj = 25 C.
Fig 9. Amplifier A: drain current as a function of
gate2 voltage; typical values
0
gain
reduction
(dB)
10
20
30
40
001aac196
80
0 10 20 30 40 50
gain reduction (dB)
VDS(A) = VDS(B) = 5 V; VG1-S(B) = 0 V; fw = 50 MHz;
funw = 60 MHz; Tamb = 25 C; see Figure 33.
Fig 10. Amplifier A: unwanted voltage for 1 %
cross modulation as a function of gain
reduction; typical values
50
01234
VAGC (V)
VDS(A) = VDS(B) = 5 V; VG1-S(B) = 0 V; f = 50 MHz; see
Figure 33.
Fig 11. Amplifier A: gain reduction as a function of
AGC voltage; typical values
BF1218_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 14 April 2010
© NXP B.V. 2010. All rights reserved.
8 of 23







BF1218 equivalent, schematic
NXP Semiconductors
www.DataSheet4U.com
BF1218
Dual N-channel dual gate MOSFET
102
bis, gis
(mS)
10
1
101
001aaa581
bis
gis
102
Yfs
(mS)
10
001aag374 102
Yfs
ϕfs
(deg)
10
ϕfs
102
10
102 103
f (MHz)
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = VG1-S(A) = 0 V;
ID(B) = 15 mA
Fig 29. Amplifier B: input admittance as a function of
frequency; typical values
1 1
10 102 103
f (MHz)
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = VG1-S(A) = 0 V;
ID(B) = 15 mA
Fig 30. Amplifier B: forward transfer admittance and
phase as a function of frequency; typical
values
103
yrs
(μS)
102
−ϕrs
001aaa583 103
−ϕrs
(deg)
102
10
bos, gos
(mS)
1
001aag376
bos
yrs
10
10 101
gos
11
10 102 103
f (MHz)
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = VG1-S(A) = 0 V;
ID(B) = 15 mA
Fig 31. Amplifier B: reverse transfer admittance and
phase as a function of frequency; typical
values
102
10
102 103
f (MHz)
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = VG1-S(A) = 0 V;
ID(B) = 15 mA
Fig 32. Amplifier B: output admittance as a function of
frequency; typical values
BF1218_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 14 April 2010
© NXP B.V. 2010. All rights reserved.
16 of 23










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