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PDF ( 数据手册 , 数据表 ) ADC0804S030

零件编号 ADC0804S030
描述 (ADC0804S030 - ADC0804S050) Single 8 bits ADC
制造商 NXP Semiconductors
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ADC0804S030 数据手册, 描述, 功能
ADC0804S030/040/050
www.DataSheet4U.com
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
Rev. 02 — 14 August 2008
Product data sheet
1. General description
The ADC0806030/040/050 are a family of 8-bit high-speed, low-power Analog-to-Digital
Converters (ADC) for professional video and other applications. It converts the analog
input signal into 8-bit binary coded digital signals at a maximum sampling rate of 50 MHz.
All digital inputs and outputs are Transistor-Transistor Logic (TTL) and CMOS compatible,
although a low-level sine wave clock input signal can also be used.
The device requires an external source to drive its reference ladder. If the application
requires that the reference is driven via internal sources, NXP recommends you use one
of the ADC1003S030/040/050 family.
2. Features
I 8-bit resolution
I Sampling rate up to 50 MHz
I DC sampling allowed
I One clock cycle conversion only
I High signal-to-noise ratio over a large analog input frequency range (7.8 effective bits
at 4.43 MHz full-scale input at fclk = 40 MHz)
I No missing codes guaranteed
I In-Range (IR) CMOS output
I TTL and CMOS levels compatible digital inputs
I 3 V to 5 V CMOS digital outputs
I Low-level AC clock input signal allowed
I External reference voltage regulator
I Power dissipation only 175 mW (typical)
I Low analog input capacitance, no buffer amplifier required
I No sample-and-hold circuit required
3. Applications
I Video data digitizing
I Radar
I Transient signal analysis
I Σ∆ modulators
I Medical imaging
I Barcode scanner
I Global Positioning System (GPS) receiver







ADC0804S030 pdf, 数据表
NXP Semiconductors
ADC0804S030/040/050
www.DataSheet4U.com
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
Table 6. Characteristics
VCCA = V3 to V4 = 4.75 V to 5.25 V; VCCD = V11 to V12 and V28 to V27 = 4.75 V to 5.25 V;
VCCO = V13 to V14 = 3.0 V to 5.25 V; AGND and DGND shorted together; Tamb = 0 °C to 70 °C; typical values measured at
VCCA = VCCD = 5 V and VCCO = 3.3 V, Vi(a)(p-p) = 2.0 V; CL = 15 pF and Tamb = 25 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ Max
Unit
Harmonics (fclk = 40 MHz); see Figure 7 and 8
α1H
first harmonic level
fi = 4.43 MHz
α2H second harmonic level fi = 4.43 MHz
α3H
third harmonic level
fi = 4.43 MHz
THD
total harmonic distortion fi = 4.43 MHz
Signal-to-noise ratio; see Figure 7 and 8[7]
-
-0
dB
-
75 65
dB
-
72 65
dB
-
65 -
dB
S/N signal-to-noise ratio
Effective number of bits[7]
full scale;
without harmonics;
fclk = 40 MHz; fi = 4.43 MHz
46
49 -
dB
ENOB
effective number of bits
Two-tone intermodulation[8]
ADC0804S030TS (fclk = 30 MHz)
fi = 4.43 MHz
-
fi = 7.5 MHz
-
ADC0804S040TS (fclk = 40 MHz)
fi = 4.43 MHz
-
fi = 7.5 MHz
-
fi = 10 MHz
-
fi = 15 MHz
-
ADC0804S050TS (fclk = 50 MHz)
fi = 4.43 MHz
-
fi = 7.5 MHz
-
fi = 10 MHz
-
fi = 15 MHz
-
7.8 -
7.8 -
7.8 -
7.8 -
7.8 -
7.4 -
7.8 -
7.8 -
7.8 -
7.3 -
bits
bits
bits
bits
bits
bits
bits
bits
bits
bits
αIM
intermodulation
fclk = 40 MHz
suppression
-
69 -
dB
Bit error rate
BER
bit error rate
fclk = 40 MHz;
fi = 4.43 MHz; VI = ±16 LSB
at code 512
-
1013
-
times/
samples
Differential gain[9]
Gdif
differential gain
fclk = 40 MHz;
PAL modulated ramp
-
0.8 -
%
ADC0804S030_040_050_2
Product data sheet
Rev. 02 — 14 August 2008
© NXP B.V. 2008. All rights reserved.
8 of 19







ADC0804S030 equivalent, schematic
NXP Semiconductors
ADC0804S030/040/050
www.DataSheet4U.com
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
13. Package outline
SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm
SOT341-1
y
Z
28
D
pin 1 index
1
e
c
15
EA
X
HE v M A
14
wM
bp
A2
A1
Q
(A3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c D(1) E(1) e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
2
0.21
0.05
1.80
1.65
0.25
0.38
0.25
0.20
0.09
10.4
10.0
5.4
5.2
0.65
7.9
7.6
1.25
1.03
0.63
0.9
0.7
0.2 0.13 0.1
1.1
0.7
8o
0o
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
OUTLINE
VERSION
SOT341-1
IEC
REFERENCES
JEDEC
JEITA
MO-150
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 15. SOT341-1 (SSOP28)
ADC0804S030_040_050_2
Product data sheet
Rev. 02 — 14 August 2008
© NXP B.V. 2008. All rights reserved.
16 of 19










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