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零件编号 | KFM1216Q2A-DEB5 | ||
描述 | FLASH MEMORY | ||
制造商 | Samsung Electronics | ||
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1 Page
MuxOneNAND512(KFM1216Q2A-DEB5)
FLASH MEMORYwww.DataSheet4U.com
MuxOneNANDTM Specification
Density
512Mb
Part No.
VCC(core & IO)
KFM1216Q2A-DEB5 1.8V(1.7V~1.95V)
Temperature
Extended
PKG
63FBGA(LF)
Version: Ver. 1.2
Date: Dec. 23, 2005
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MuxOneNAND512(KFM1216Q2A-DEB5)
FLASH MEMORYwww.DataSheet4U.com
1.6 General Overview
MuxOneNAND™‚ is a monolithic integrated circuit with a NAND Flash array using a NOR Flash interface. This device includes con-
trol logic, a NAND Flash array, and 5KB of internal BufferRAM. The BufferRAM reserves 1KB for boot code buffering (BootRAM) and
4KB for data buffering (DataRAM), split between 2 independent buffers. It has a x16 Host Interface and a random access time speed
of ~76ns.
The device operates up to a maximum host-driven clock frequency of 54MHz for synchronous reads at Vcc(or Vccq. Refer to chapter
4.2) with minimum 4-clock latency. Below 40MHz it is accessible with minimum 3-clock latency. Appropriate wait cycles are deter-
mined by programmable read latency.
MuxOneNAND provides for multiple sector read operations by assigning the number of sectors to be read in the sector counter
register. The device includes one block-sized OTP (One Time Programmable) area that can be used to increase system security or
to provide identification capabilities.
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MuxOneNAND512(KFM1216Q2A-DEB5)
External Memory Array Organization
FLASH MEMORYwww.DataSheet4U.com
BootRAM
DataRAM0
DataRAM1
Main area data
(512B)
Spare area data
(16B)
BootRAM 0
BootRAM 1
Sector: (512 + 16) Byte
DataRAM 0_0
DataRAM 0_1
DataRAM 0_2
DataRAM 0_3
DataRAM 1_0
DataRAM 1_1
DataRAM 1_2
DataRAM 1_3
16
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页数 | 70 页 | ||
下载 | [ KFM1216Q2A-DEB5.PDF 数据手册 ] |
零件编号 | 描述 | 制造商 |
KFM1216Q2A-DEB5 | FLASH MEMORY | Samsung Electronics |
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