DataSheet8.cn


PDF ( 数据手册 , 数据表 ) TV00570003CDGB

零件编号 TV00570003CDGB
描述 (TV00570002CDGB / TV00570003CDGB) Pseudo SRAM and NOR Flash Memory Mixed Multi-Chip Package
制造商 Toshiba
LOGO Toshiba LOGO 


1 Page

No Preview Available !

TV00570003CDGB 数据手册, 描述, 功能
TV00570002/003CDGB
TOSHIBA MULTI-CHIP INTEGRATED CIRCUIT SILICON GATE CMOS
TENTATIVE
Pseudo SRAM and NOR Flash Memory Mixed Multi-Chip Package
DESCRIPTION
The TV00570002/003CDGB is a mixed multi-chip package containing a 33,554,432-bit pseudo static RAM and a
134,217,728-bit Nor Flash Memory. The TV00570002/003CDGB is available in a 81-pin BGA package making it
suitable for a variety of applications.
MCP Features
Power supply voltage of 2.7 to 3.3 V
Operating temperature of 30° to 85°C
Package
P-TFBGA81-0710-0.80BZ (Weight: 0.15 g)
Pseudo SRAM Features
Organization : 2M × 16 bits
www.DataSPhoeweet4rUd.cisosmipation
Operating :
40 mA maximum
Standby :
150 μA maximum
Deep power-down standby : 5 μA maximum
Access time :
Random / Page : 70 ns / 30 ns @CL=30pF
Page read operation by 8 words
Deep power-down mode : Memory cell data invalid
Nor Flash Memory Features
Organization: 8M × 16 bits
Power dissipation
Read operating :
55 mA maximum
Address Increment Read operation:
Page Read operating :
24mA maximum
5 mA maximum
Program / Erase operating: 15 mA maximum
Standby :
Access time :
Random :
10 μA maximum
70 ns @CL=30pF
Page :
25 ns @CL=30pF
Functions
Simultaneous Read/Write
Page read
Auto-Program , Auto Page Program
Auto Block Erase , Auto Chip Erase
Program Suspend / Resume
Erase Suspend/Resume
Data polling / Toggle bit
Password block protection
Block Protection/Boot Block Protection
Automatic Sleep, supports for hidden ROM Area
Common Flash Memory Interface (CFI)
Block erase architecture
8 × 8 Kbytes / 127 × 64 Kbytes
Bank architecture
16 Mbits × 8 Banks
Boot block architecture
TV00570002CDGB : top boot block
TV00570003CDGB : bottom boot block
Mode control
Compatible with JEDEC standard commands
Erase/Program cycles
100,000 cycles typ.
2008-05-08 1/9







TV00570003CDGB pdf, 数据表
PACKAGE DIMENSIONS
TV00570002/003CDGB
P-TFBGA81-0710-0.80BZ
0.20 S B
10.00
Unit: mm
www.DataSheet4U.com
INDEX
4
0.15
0.10 S
S
0.10 S
B
0.08 S AB 0.46 0.05
INDEX
1
2
3
4
5
6
7
8
ABCDE FGHJ KLM
0.80
0.40
0.60
A
2008-05-08 8/9







TV00570003CDGB equivalent, schematic
TC58FVM7(T/B)DD
128 Mbits NOR FLASH MEMORY
TC58FVM7TDD : Top Boot Block
TC58FVM7BDDwww.DataSheet4U.com : Bottom Boot Block
Organization : 8M × 16bits
2008-07-24 F-1/47










页数 30 页
下载[ TV00570003CDGB.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
TV00570003CDGB(TV00570002CDGB / TV00570003CDGB) Pseudo SRAM and NOR Flash Memory Mixed Multi-Chip PackageToshiba
Toshiba

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap