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PDF ( 数据手册 , 数据表 ) R2023T

零件编号 R2023T
描述 2-wire Serial Interface Real Time Clock IC
制造商 RICOH
LOGO RICOH LOGO 


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R2023T 数据手册, 描述, 功能
R2023K/T
www.DataSheet4U.com
2-wire Serial Interface Real Time Clock IC
OUTLINE
NO.EA-124-070221
The R2023K/T is a CMOS real-time clock IC connected to the CPU by two signal lines, SCL, SDA, and configured
to perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit is configured to
generate interrupt signals with six selectable interrupts ranging from 0.5 seconds to 1 month. The 2 alarm
interrupt circuits generate interrupt signals at preset times. As the oscillation circuit is driven under constant
voltage, fluctuation of the oscillator frequency due to supply voltage is small, and the time keeping current is small
(TYP. 0.45µA at 3V). The oscillation halt sensing circuit can be used to judge the validity of internal data in such
events as power-on; The supply voltage monitoring circuit is configured to record a drop in supply voltage below
two selectable supply voltage monitoring threshold settings. The 32.768kHz clock output function (CMOS output
with control pin) is intended to output sub-clock pulses for the external microcomputer. The oscillation adjustment
circuit is intended to adjust time counts with high precision by correcting deviations in the oscillation frequency of
the crystal oscillator. Since the package for these ICs are TSSOP10G (4.0x2.9x1.0: R2023T) or FFP12
(2.0x2.0x1.0: R2023K), high density mounting of ICs on boards is possible.
FEATURES
Minimum Timekeeping supply voltage TYP:0.66 to 5.5v (Worst: 1.00V to 5.5v); VDD pin
Low power consumption
0.45µA TYP at VDD=3V (1.00µA MAX.)
Two signal lines (SCL, SDA) required for connection to the CPU.
Time counters (counting hours, minutes, and seconds) and calendar counters (counting years, months, days,
and weeks) (in BCD format)
Interrupt circuit configured to generate interrupt signals (with interrupts ranging from 0.5 seconds to 1 month) to
the CPU and provided with an interrupt flag and an interrupt halt
2 alarm interrupt circuits (Alarm_W for week, hour, and minute alarm settings and Alarm_D for hour and minute
alarm settings)
With Power-on flag to prove that the power supply starts from 0V
32-kHz clock output pin (CMOS push-pull output with control pin)
Supply voltage monitoring circuit with two supply voltage monitoring threshold settings
Automatic identification of leap years up to the year 2099
Selectable 12-hour and 24-hour mode settings
High precision oscillation adjustment circuit
Built-in oscillation stabilization capacitors (CG and CD)
Package TSSOP10G (4.0mm x 2.9mm x 1.0mm: R2023T) FFP12 (2.0mm x 2.0mm x 1.0mm: R2023K)
CMOS process
1







R2023T pdf, 数据表
R2023K/T
R2023T
2.9±0.2
10 6
0 to 10°
www.DataSheet4U.com
15
0.5
0.13
+0.1
-0.05
0.1
0.2±0.1 0.15 M
unit: mm
8







R2023T equivalent, schematic
R2023K/T
Time Counter (Address 0-2h)
www.DataSheet4U.com
Second Counter (Address 0h)
D7 D6 D5
- S40 S20
0 S40 S20
0 Indefi Indefi
nite nite
D4
S10
S10
Indefi
nite
D3
S8
S8
Indefi
nite
D2
S4
S4
Indefi
nite
D1
S2
S2
Indefi
nite
D0
S1
S1
Indefi
nite
(For Writing)
(For Reading)
Default Settings *)
Minute Counter (Address 1h)
D7 D6 D5
-
M40
M20
0
M40
M20
0 Indefi Indefi
nite nite
D4
M10
M10
Indefi
nite
D3
M8
M8
Indefi
nite
D2
M4
M4
Indefi
nite
D1
M2
M2
Indefi
nite
D0
M1
M1
Indefi
nite
(For Writing)
(For Reading)
Default Settings *)
Hour Counter (Address 2h)
D7 D6 D5
- - P/ A
or
H20
0 0 P/ A
or
H20
0 0 Indefi
nite
D4
H10
H10
Indefi
nite
D3
H8
H8
Indefi
nite
D2
H4
H4
Indefi
nite
D1
H2
H2
Indefi
nite
D0
H1 (For Writing)
H1 (For Reading)
Indefi
nite
Default Settings *)
*) Default settings: Default value means read / written values when the PON bit is set to “1” due to VDD
power-on from 0 volts.
* Time digit display (BCD format) as follows:
The second digits range from 00 to 59 and are carried to the minute digit in transition from 59 to 00.
The minute digits range from 00 to 59 and are carried to the hour digits in transition from 59 to 00.
The hour digits range as shown in "P12 Control Register 1 (ADDRESS Eh) (2) 12 /24: 12 /24-hour
Mode Selection Bit" and are carried to the day-of-month and day-of-week digits in transition from PM11 to
AM12 or from 23 to 00.
* Any writing to the second counter resets divider units of less than 1 second.
* Any carry from lower digits with the writing of non-existent time may cause the time counters to malfunction.
Therefore, such incorrect writing should be replaced with the writing of existent time data.
Day-of-week Counter (Address 3h)
D7 D6 D5 D4 D3 D2 D1 D0
- - - - - W4 W2 W1 (For Writing)
0
0
0
0
0
W4 W2 W1
(For Reading)
0 0 0 0 0 Indefi Indefi Indefi Default Settings *)
nite nite nite
*) Default settings: Default value means read / written values when the PON bit is set to “1” due to VDD
power-on from 0 volts.
* The day-of-week counter is incremented by 1 when the day-of-week digits are carried to the day-of-month
digits.
* Day-of-week display (incremented in septimal notation):
(W4, W2, W1) = (0, 0, 0) (0, 0, 1)(1, 1, 0) (0, 0, 0)
16










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