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PDF ( 数据手册 , 数据表 ) AD7195

零件编号 AD7195
描述 24-BIT SIGMA-DELTA ADC
制造商 Analog Devices
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AD7195 数据手册, 描述, 功能
4.8 kHz, UltralowwwwN.DoatiasSheee,t42U.4co-mBit
Sigma-Delta ADC with PGA and AC Excitation
AD7195
FEATURES
AC or DC sensor excitation
RMS noise: 8.5 nV at 4.7 Hz (gain = 128)
16 noise-free bits at 2.4 kHz (gain = 128)
Up to 22.5 noise-free bits (gain = 1)
Offset drift: 5 nV/°C
Gain drift: 1 ppm/°C
Specified drift over time
2 differential/4 pseudo differential input channels
Automatic channel sequencer
Programmable gain (1 to 128)
Output data rate: 4.7 Hz to 4.8 kHz
Internal or external clock
Simultaneous 50 Hz/60 Hz rejection
Power supply
AVDD: 4.75 V to 5.25 V
DVDD: 2.7 V to 5.25 V
Current: 6 mA
Temperature range: –40°C to +105°C
Package: 32-lead LFCSP
INTERFACE
3-wire serial
SPI, QSPI™, MICROWIRE™, and DSP compatible
Schmitt trigger on SCLK
APPLICATIONS
Chromatography
PLC/DCS analog input modules
Data acquisition
Medical and scientific instrumentation
GENERAL DESCRIPTION
The AD7195 is a low noise, complete analog front end for high
precision measurement applications. It contains a low noise,
24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC).
The on-chip low noise gain stage means that signals of small
amplitude can be interfaced directly to the ADC. The AD7195
contains ac excitation, which is used to remove dc-induced
offsets from bridge sensors.
The device can be configured to have two differential inputs or
four pseudo differential inputs. The on-chip channel sequencer
allows several channels to be enabled, and the AD7195 sequentially
converts on each enabled channel. This simplifies communication
with the part. The on-chip 4.92 MHz clock can be used as the
clock source to the ADC or, alternatively, an external clock or
crystal can be used. The output data rate from the part can be
varied from 4.7 Hz to 4.8 kHz.
The device has two digital filter options. The choice of filter
affects the rms noise/noise-free resolution at the programmed
output data rate, the settling time, and the 50 Hz/60 Hz rejec-
tion. For applications that require all conversions to be settled,
the AD7195 includes a zero latency feature.
Weigh scales
Strain gage transducers
Pressure measurement
Temperature measurement
The part operates with a 5 V analog power supply and a digital
power supply from 2.7 V to 5.25 V. It consumes a current of
6 mA. It is housed in a 32-lead LFCSP package.
FUNCTIONAL BLOCK DIAGRAM
AVDD AGND DVDD DGND
REFIN(+) REFIN(–)
AIN1
AIN2
AIN3
AIN4
AINCOM
BPDSW
AVDD
MUX
PGA
Σ-Δ
ADC
AGND
TEMP
SENSOR
AD7195
AC
EXCITATION
CLOCK
REFERENCE
DETECT
SERIAL
INTERFACE
AND
CONTROL
LOGIC
DOUT/RDY
DIN
SCLK
CS
SYNC
CLOCK
CIRCUITRY
ACX1 ACX1
Figure 1.
ACX2
ACX2 MCLK1 MCLK2
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.







AD7195 pdf, 数据表
AD7195
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
AVDD to AGND
DVDD to AGND
AGND to DGND
Analog Input Voltage to AGND
Reference Input Voltage to AGND
Digital Input Voltage to DGND
Digital Output Voltage to DGND
AIN/Digital Input Current
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature
Lead Temperature, Soldering
Reflow
Rating
0.3 V to +6.5 V
0.3 V to +6.5 V
0.3 V to +0.3 V
0.3 V to AVDD + 0.3 V
0.3 V to AVDD + 0.3 V
0.3 V to DVDD + 0.3 V
0.3 V to DVDD + 0.3 V
10 mA
40°C to +105°C
65°C to +150°C
150°C
260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
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THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
θJA θJC Unit
32-Lead LFCSP_WQ
32.5 32.71 °C/W
ESD CAUTION
Rev. 0 | Page 8 of 44







AD7195 equivalent, schematic
AD7195
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SINC3 CHOP ENABLED
Table 15. RMS Noise (nV) vs. Gain and Output Data Rate
Filter Word Output Data Settling
(Decimal) Rate (Hz) Time (ms) Gain of 1
Gain of 8
1023
1.56
1282
205
88
640 2.5
800 332
95
480
3.33
600 431
103
96
16.6
120 778
113
80 20
100 849
120
32 50
40
1061
163
16
100
20
1379
218
5 320 6.25 2828 417
2
800
2.5
40,022
4950
1
1600
1.25
312,540
38,890
Gain of 16
37
40
41
61
67
92
124
233
2475
19,800
Gain of 32
17
21
23
35
39
57
78
141
1273
9900
Gain of 64
7.5
9
11.5
25
28
41
59
106
636
4950
Table 16. Peak-to-Peak Noise (nV) vs. Gain and Output Data Rate
Filter Word Output Data Settling
(Decimal) Rate (Hz) Time (ms) Gain of 1
Gain of 8
1023
1.56
1282
1202
530
640 2.5
800 1697 566
480 3.33 600 2121 636
96 16.6 120 4667 686
80 20
100 4808 707
32 50
40
6293
990
16
100
20
9192
1414
5
320
6.25
17,680
2404
2
800
2.5
219,200
29,000
1
1600
1.25 1,838,500 212,200
Gain of 16
184
240
255
318
424
474
707
1556
15,560
120,200
Gain of 32
92
120
141
198
205
382
474
849
8485
55,870
Gain of 64
46
59
71
141
170
255
332
601
3960
29,000
Table 17. Effective Resolution (Peak-to-Peak Resolution) vs. Gain and Output Data Rate
Filter Word Output Data Settling
(Decimal) Rate (Hz)
Time (ms) Gain of 11 Gain of 81 Gain of 161 Gain of 321
1023
1.56
1282
24 (23)
24 (21.5) 24 (21.5)
24 (21.5)
640 2.5
800 24 (22.5) 23.8 (21.3) 23.8 (21.3) 23.8 (21.3)
480
3.33
600
24 (22.5) 23.7 (21) 23.7 (21)
23.7 (21)
96 16.6 120 23.6 (21) 23.4 (20.8) 23.3 (20.8) 23.1 (20.5)
80 20
100 23.5 (21) 23.3 (20.6) 23.1 (20.5) 22.9 (20.5)
32 320 40 23.2 (20.5) 22.9 (20.3) 22.7 (20.2) 22.4 (19.8)
16 100 20 22.8 (20) 22.5 (19.8) 22.3 (19.8) 21.9 (19.3)
5 320 6.25 21.8 (19) 21.5 (19) 21.4 (18.6) 21.1 (18.5)
2 800 2.5 17.9 (15.4) 17.9 (15.4) 17.9 (15.3) 17.9 (15.2)
1
1600
1.25 15 (12.4) 15 (12.4) 14.9 (12.3) 14.9 (12.3)
Gain of 641
24 (21.5)
23.8 (21.3)
23.7 (21)
22.6 (20.1)
22.4 (19.8)
21.9 (19.2)
21.3 (18.8)
20.5 (18)
17.9 (15.2)
14.9 (12.3)
1 The output peak-to-peak (p-p) resolution is listed in parentheses.
When ac excitation is enabled, the rms noise and resolution is the same as for chop enabled mode.
Gain of 128
6.5
8
9
21
23
35
52
94
346
2440
Gain of 128
40
42
49
127
141
219
354
566
2192
16,970
Gain of 1281
23.5 (20.9)
23.2 (20.8)
23.1 (20.6)
21.9 (19.2)
21.7 (19.1)
21.1 (18.4)
20.5 (17.8)
19.7 (17.1)
17.8 (15.1)
14.9 (12.2)
Rev. 0 | Page 16 of 44










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