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PDF ( 数据手册 , 数据表 ) ADE5566

零件编号 ADE5566
描述 (ADE5166 - ADE5569) Single-Phase Energy Measurement IC
制造商 Analog Devices
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ADE5566 数据手册, 描述, 功能
Single-Phase Energy Measurement IC with
8052 MCU, RTC, and LCD Driver
ADE5166/ADE5169/ADE5566/ADE5569
GENERAL FEATURES
Wide supply voltage operation: 2.4 V to 3.7 V
Internal bipolar switch between regulated and battery inputs
Ultralow power operation with power saving modes (PSM)
Full operation: 4.4 mA to 1.6 mA (PLL clock dependent)
Battery mode: 3.3 mA to 400 μA (PLL clock dependent)
Sleep mode
Real-time clock (RTC) mode: 1.7 μA
RTC and LCD mode: 38 μA (LCD charge pump enabled)
Reference: 1.2 V ± 0.1% (10 ppm/°C drift)
64-lead, low profile quad flat, RoHS-compliant package (LQFP)
Operating temperature range: −40°C to +85°C
ENERGY MEASUREMENT FEATURES
Proprietary analog-to-digital converters (ADCs) and digital
signal processing (DSP) provide high accuracy active
(watt), reactive (var), and apparent energy (volt-ampere
(VA)) measurement
<0.1% error on active energy over a dynamic range of
1000 to 1 @ 25°C
<0.5% error on reactive energy over a dynamic range of
1000 to 1 @ 25°C (ADE5169 and ADE5569 only)
<0.5% error on root mean square (rms) measurements
over a dynamic range of 500 to 1 for current (Irms) and
100 to 1 for voltage (Vrms) @ 25°C
Supports IEC 62053-21; IEC 62053-22; IEC 62053-23;
EN 50470-3 Class A, Class B, and Class C; and ANSI C12-16
Differential input with programmable gain amplifiers (PGAs)
www.DatasSuhpepeot4rUts.csohmunts, current transformers, and di/dt current
sensors (ADE5169 and ADE5569 only)
2 current inputs for antitamper detection in the ADE5166/
ADE5169
High frequency outputs proportional to Irms, active, reactive,
or apparent power (AP)
Table 1. Features Available on Each Part
Part No.
Antitamper
Watt, VA,
Irms, Vrms
Var
ADE5166 Yes
Yes No
ADE5169 Yes
Yes Yes
ADE5566 No
Yes No
ADE5569 No
Yes Yes
di/dt
Sensor
No
Yes
No
Yes
MICROPROCESSOR FEATURES
8052-based core
Single-cycle 4 MIPS 8052 core
8052-compatible instruction set
32.768 kHz external crystal with on-chip PLL
2 external interrupt sources
External reset pin
Low power battery mode
Wake-up from I/O, temperature change, alarm, and
universal asynchronous receiver/transmitter (UART)
LCD driver operation with automatic scrolling
Temperature measurement
Real-time clock (RTC)
Counter for seconds, minutes, hours, days, months,
and years
Date counter, including leap year compensation
Automatic battery switchover for RTC backup
Operation down to 2.4 V
Ultralow battery supply current: 1.7 μA
Selectable output frequency: 1 Hz to 16 kHz
Embedded digital crystal frequency compensation for
calibration and temperature variation of 2 ppm resolution
Integrated LCD driver
108-segment driver for the ADE5566 and ADE5569
104-segment driver for the ADE5166 and ADE5169
2×, 3×, or 4× multiplexing
4 LCD memory banks for screen scrolling
LCD voltages generated internally or with external resistors
Internal adjustable drive voltages up to 5 V independent
of power supply level
On-chip peripherals
2 independent UART interfaces
SPI or I2C
Watchdog timer
Power supply management with user-selectable levels
Memory: 62 kB flash memory, 2.256 kB RAM
Development tools
Single-pin emulation
IDE-based assembly and C source debugging
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2009 Analog Devices, Inc. All rights reserved.







ADE5566 pdf, 数据表
ADE5166/ADE5169/ADE5566/ADE5569
Parameter
LCD, RESISTOR LADDER ACTIVE
Leakage Current
V1 Segment Line Voltage
V2 Segment Line Voltage
V3 Segment Line Voltage
ON-CHIP REFERENCE
Reference Error
Power Supply Rejection
Temperature Coefficient1
Min Typ
LCDVA − 0.1
LCDVB − 0.1
LCDVC − 0.1
±20
−2.2
80
10
Max Unit
Test Conditions/Comments
LCDVA
LCDVB
LCDVC
+2.2
50
nA
V
V
V
mV
dB
ppm/°C
1/2 and 1/3 bias modes, no load
Current on segment line = −2 μA
Current on segment line = −2 μA
Current on segment line = −2 μA
Nominal 1.2035 V
TA = 25°C, fCORE = 1.024 MHz
fCORE = 1.024 MHz
1 These specifications are not production tested but are guaranteed by design and/or characterization data on production release.
2 Delay between ADC conversion request and interrupt set.
DIGITAL INTERFACE
Table 4.
Parameter
LOGIC INPUTS1
All Inputs Except XTAL1, XTAL2, BCTRL,
INT0, INT1, RESET
Input High Voltage, VINH
Input Low Voltage, VINL
BCTRL, INT0, INT1, RESET
Input High Voltage, VINH
Input Low Voltage, VINL
Input Currents
RESET
Port 0, Port 1, Port 2
Input Capacitance
FLASH MEMORY
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Data Retention3
CRYSTAL OSCILLATOR4
Crystal Equivalent Series Resistance
Crystal Frequency
XTAL1 Input Capacitance
XTAL2 Output Capacitance
MCU CLOCK RATE (fCORE)
LOGIC OUTPUTS
Output High Voltage, VOH
ISOURCE
Output Low Voltage, VOL5
ISINK
START-UP TIME6
PSM0 Power-On Time
From Power Saving Mode 1 (PSM1)
PSM1 to PSM0
From Power Saving Mode 2 (PSM2)
PSM2 to PSM1
PSM2 to PSM0
Min
2.0
1.3
−3.75
20,000
20
30
32
2.4
Typ Max Unit
Test Conditions/Comments
0.8
0.8
100
±100
−8.5
10
32.768
12
12
4.096
32
50
33.5
80
0.4
2
880
130
48
186
V
V
V
V
nA
nA
μA
pF
Cycles
Years
kHz
pF
pF
MHz
kHz
V
μA
V
mA
ms
ms
ms
ms
RESET = VSWOUT = 3.3 V
Internal pull-up disabled, input = 0 V or
VSWOUT
Internal pull-up enabled, input = 0 V,
VSWOUT = 3.3 V
All digital inputs
At 25°C
TJ = 85°C
Crystal = 32.768 kHz and CD bits = 0b000
Crystal = 32.768 kHz and CD bits = 0b111
VDD = 3.3 V ± 5%
VDD = 3.3 V ± 5%
VDD at 2.75 V to PSM0 code execution
VDD at 2.75 V to PSM0 code execution
Wake-up event to PSM1 code execution
VDD at 2.75 V to PSM0 code execution
Rev. B | Page 8 of 156







ADE5566 equivalent, schematic
ADE5166/ADE5169/ADE5566/ADE5569
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
COM3/FP27 1
COM2/FP28 2
COM1 3
COM0 4
P1.2/FP25/ZX 5
P1.3/T2EX/FP24 6
P1.4/T2/FP23 7
P1.5/FP22 8
P1.6/FP21 9
P1.7/FP20 10
P0.1/FP19 11
P2.0/FP18 12
P2.1/FP17 13
P2.2/FP16 14
LCDVC 15
LCDVP2 16
PIN 1
ADE5166/ADE5169
TOP VIEW
(Not to Scale)
48 INT0
47 XTAL1
46 XTAL2
45 BCTRL/INT1/P0.0
44 SDEN/P2.3/TxD2
43 P0.2/CF1
42 P0.3/CF2
41 P0.4/MOSI/SDATA
40 P0.5/MISO/ZX
39 P0.6/SCLK/T0
38 P0.7/SS/T1/RxD2
37 P1.0/RxD
36 P1.1/TxD
35 FP0
34 FP1
33 FP2
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Figure 9. ADE5166/ADE5169 Pin Configuration
Table 13. Pin Function Descriptions
Pin No. Mnemonic
Description
1
COM3/FP27
Common Output 3/LCD Segment Output 27. COM3 is used for the LCD backplane.
2
COM2/FP28
Common Output 2/LCD Segment Output 28. COM2 is used for the LCD backplane.
3 COM1
Common Output 1. COM1 is used for the LCD backplane.
4 COM0
Common Output 0. COM0 is used for the LCD backplane.
5
P1.2/FP25/ZX
General-Purpose Digital I/O Port 1.2/LCD Segment Output 25/ZX Output.
6 P1.3/T2EX/FP24 General-Purpose Digital I/O Port 1.3/Timer 2 Control Input/LCD Segment Output 24.
7 P1.4/T2/FP23
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General-Purpose Digital I/O Port 1.4/Timer 2 Input/LCD Segment Output 23.
General-Purpose Digital I/O Port 1.5/LCD Segment Output 22.
9 P1.6/FP21
General-Purpose Digital I/O Port 1.6/LCD Segment Output 21.
10 P1.7/FP20
General-Purpose Digital I/O Port 1.7/LCD Segment Output 20.
11 P0.1/FP19
General-Purpose Digital I/O Port 0.1/LCD Segment Output 19.
12 P2.0/FP18
General-Purpose Digital I/O Port 2.0/LCD Segment Output 18.
13 P2.1/FP17
General-Purpose Digital I/O Port 2.1/LCD Segment Output 17.
14 P2.2/FP16
General-Purpose Digital I/O Port 2.2/LCD Segment Output 16.
15 LCDVC
Output Port for LCD Levels. This pin should be decoupled with a 470 nF capacitor.
16 LCDVP2
Analog Output. A 100 nF capacitor should be connected between this pin and LCDVP1 for the internal LCD
charge pump device.
17, 18 LCDVB, LCDVA
Output Ports for LCD Levels. These pins should be decoupled with a 470 nF capacitor.
19 LCDVP1
Analog Output. A 100 nF capacitor should be connected between this pin and LCDVP2 for the internal LCD
charge pump device.
20 to 35 FP15 to FP0
LCD Segment Output 15 to LCD Segment Output 0.
36 P1.1/TxD
General-Purpose Digital I/O Port 1.1/Transmitter Data Output (Asynchronous).
37 P1.0/RxD
General-Purpose Digital I/O Port 1.0/Receive Data Input (Asynchronous).
38 P0.7/SS/T1/RxD2 General-Purpose Digital I/O Port 0.7/Slave Select When SPI Is in Slave Mode/Timer 1 Input/Receive Data
Input 2 (Asynchronous).
39
P0.6/SCLK/T0
General-Purpose Digital I/O Port 0.6/Clock Output for I2C or SPI Port/Timer 0 Input.
40
P0.5/MISO/ZX
General-Purpose Digital I/O Port 0.5/Data Input for SPI Port/ZX Output.
41 P0.4/MOSI/SDATA General-Purpose Digital I/O Port 0.4/Data Output for SPI Port/I2C-Compatible Data Line.
Rev. B | Page 16 of 156










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