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零件编号 | KK4034B | ||
描述 | 8-Stage Static Bidirectional Parallel/ Serial Input/Output Bus Register High-Voltage Silicon-Gate CMOS | ||
制造商 | KODENSHI KOREA | ||
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8-Stage Static Bidirectional Parallel/
Serial Input/Output Bus Register
High-Voltage Silicon-Gate CMOS
TECHNICAL DATA
KK4034B
The KK4034B is a static eight-stage parallel-or serial-input parallel-
output register. It can be used to:
1) bidirectionally transfer parallel information between two buses, 2)
convert serial data to parallel form and direct the parallel data to either of
two buses, 3) store (recirculate) parallel data, or 4) accept parallel data
from either of two buses and convert that data to serial form. Inputs that
control the operations include a single-phase CLOCK (CL), A DATA
ENABLE (AE), ASYNCHRONOUS/SYNCHRONOUS (A/S), A-BUS-
TO-B-BUS/ B-BUS-TO-A-BUS (A/B), and PARALLEL/SERIAL (P/S).
Data inputs include 16 bidirectional parallel data lines of which the
eight A data lines are inputs (3-state outputs) and the B data lines are
ORDERING INFORMATION
KK4034BN Plastic
KK4034BDW SOIC
TA = -55° to 125° C for all packages
outputs (inputs) dependung on the signal level on the A/B input. In
addition, an input for SERIAL DATA is also provided.
All register stages are D-type master-slave flip-flops with separate
master and slave clock inputs generated internally to allow synchronous
or asynchronous data transfer from master to slave.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 24=VCC
PIN 12= GND
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EXPANDED LOGIC DIAGRAM
KK4034B
Steering logic diagram
Register stage logic diagram (1/8 stages)
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页数 | 9 页 | ||
下载 | [ KK4034B.PDF 数据手册 ] |
零件编号 | 描述 | 制造商 |
KK4034B | 8-Stage Static Bidirectional Parallel/ Serial Input/Output Bus Register High-Voltage Silicon-Gate CMOS | KODENSHI KOREA |
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